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[Qemu-devel] [PULL 26/27] linux-user: Determine the desired FPU mode fro
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL 26/27] linux-user: Determine the desired FPU mode from MIPS.abiflags |
Date: |
Mon, 29 Oct 2018 16:20:17 +0100 |
From: Stefan Markovic <address@hidden>
Floating-point mode is calculated from MIPS.abiflags FP ABI value
(based on kernel implementation). Illegal combinations are rejected.
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
linux-user/mips/cpu_loop.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
index c9c20cf..97e4957 100644
--- a/linux-user/mips/cpu_loop.c
+++ b/linux-user/mips/cpu_loop.c
@@ -740,6 +740,34 @@ void target_cpu_copy_regs(CPUArchState *env, struct
target_pt_regs *regs)
struct image_info *info = ts->info;
int i;
+ struct mode_req {
+ bool single;
+ bool soft;
+ bool fr1;
+ bool frdefault;
+ bool fre;
+ };
+
+ static const struct mode_req fpu_reqs[] = {
+ [MIPS_ABI_FP_ANY] = { true, true, true, true, true },
+ [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true },
+ [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false },
+ [MIPS_ABI_FP_SOFT] = { false, true, false, false, false },
+ [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
+ [MIPS_ABI_FP_XX] = { false, false, true, true, true },
+ [MIPS_ABI_FP_64] = { false, false, true, false, false },
+ [MIPS_ABI_FP_64A] = { false, false, true, false, true }
+ };
+
+ /*
+ * Mode requirements when .MIPS.abiflags is not present in the ELF.
+ * Not present means that everything is acceptable except FR1.
+ */
+ static struct mode_req none_req = { true, true, false, true, true };
+
+ struct mode_req prog_req;
+ struct mode_req interp_req;
+
for(i = 0; i < 32; i++) {
env->active_tc.gpr[i] = regs->regs[i];
}
@@ -747,6 +775,53 @@ void target_cpu_copy_regs(CPUArchState *env, struct
target_pt_regs *regs)
if (regs->cp0_epc & 1) {
env->hflags |= MIPS_HFLAG_M16;
}
+
+#ifdef TARGET_ABI_MIPSO32
+# define MAX_FP_ABI MIPS_ABI_FP_64A
+#else
+# define MAX_FP_ABI MIPS_ABI_FP_SOFT
+#endif
+ if ((info->fp_abi > MAX_FP_ABI && info->fp_abi != MIPS_ABI_FP_UNKNOWN)
+ || (info->interp_fp_abi > MAX_FP_ABI &&
+ info->interp_fp_abi != MIPS_ABI_FP_UNKNOWN)) {
+ fprintf(stderr, "qemu: Unexpected FPU mode\n");
+ exit(1);
+ }
+
+ prog_req = (info->fp_abi == MIPS_ABI_FP_UNKNOWN) ? none_req
+ : fpu_reqs[info->fp_abi];
+ interp_req = (info->interp_fp_abi == MIPS_ABI_FP_UNKNOWN) ? none_req
+ : fpu_reqs[info->interp_fp_abi];
+
+ prog_req.single &= interp_req.single;
+ prog_req.soft &= interp_req.soft;
+ prog_req.fr1 &= interp_req.fr1;
+ prog_req.frdefault &= interp_req.frdefault;
+ prog_req.fre &= interp_req.fre;
+
+ bool cpu_has_mips_r2_r6 = env->insn_flags & ISA_MIPS32R2 ||
+ env->insn_flags & ISA_MIPS64R2 ||
+ env->insn_flags & ISA_MIPS32R6 ||
+ env->insn_flags & ISA_MIPS64R6;
+
+ if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) {
+ env->CP0_Config5 |= (1 << CP0C5_FRE);
+ if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) {
+ env->hflags |= MIPS_HFLAG_FRE;
+ }
+ } else if ((prog_req.fr1 && prog_req.frdefault) ||
+ (prog_req.single && !prog_req.frdefault)) {
+ if ((env->active_fpu.fcr0 & (1 << FCR0_F64)
+ && cpu_has_mips_r2_r6) || prog_req.fr1) {
+ env->CP0_Status |= (1 << CP0St_FR);
+ env->hflags |= MIPS_HFLAG_F64;
+ }
+ } else if (!prog_req.fre && !prog_req.frdefault &&
+ !prog_req.fr1 && !prog_req.single && !prog_req.soft) {
+ fprintf(stderr, "qemu: Can't find a matching FPU mode\n");
+ exit(1);
+ }
+
if (env->insn_flags & ISA_NANOMIPS32) {
return;
}
--
2.7.4
- [Qemu-devel] [PULL 09/27] target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2', (continued)
- [Qemu-devel] [PULL 09/27] target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2', Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 07/27] target/mips: Add bit encoding for MXU accumulate add/sub 1-bit pattern 'aptn1', Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 05/27] target/mips: Add and integrate MXU decoding engine placeholder, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 06/27] target/mips: Add MXU decoding engine, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 10/27] target/mips: Add bit encoding for MXU operand getting pattern 'optn2', Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 25/27] linux-user: Read and set FP ABI value from MIPS abiflags, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 22/27] elf: Define MIPS_ABI_FP_UNKNOWN macro, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 16/27] target/mips: Add emulation of MXU instruction D16MUL, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 11/27] target/mips: Add bit encoding for MXU operand getting pattern 'optn3', Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 15/27] target/mips: Add emulation of MXU instruction S8LDD, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 26/27] linux-user: Determine the desired FPU mode from MIPS.abiflags,
Aleksandar Markovic <=
- [Qemu-devel] [PULL 24/27] linux-user: Extract MIPS abiflags from ELF file, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 18/27] target/mips: Add emulation of MXU instructions Q8MUL and Q8MULSU, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 14/27] target/mips: Move MUL, S32M2I, S32I2M handling out of main MXU switch, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 17/27] target/mips: Add emulation of MXU instruction D16MAC, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 13/27] target/mips: Add emulation of MXU instructions S32I2M and S32M2I, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 04/27] target/mips: Amend MXU instruction opcodes, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 20/27] target/mips: Move MXU_EN check one level higher, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 21/27] target/mips: Amend MXU ASE overview note, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 19/27] target/mips: Add emulation of MXU instructions S32LDD and S32LDDR, Aleksandar Markovic, 2018/10/29
- [Qemu-devel] [PULL 23/27] linux-user: Extend image_info struct with MIPS fp_abi and interp_fp_abi fields, Aleksandar Markovic, 2018/10/29