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[Qemu-devel] [PATCH 02/17] target/arm: Extract TCMA with ARMVAParameters
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 02/17] target/arm: Extract TCMA with ARMVAParameters |
Date: |
Mon, 14 Jan 2019 12:11:07 +1100 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/internals.h | 1 +
target/arm/helper.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 6c018e773c..2922324f63 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -959,6 +959,7 @@ typedef struct ARMVAParameters {
bool tbid : 1;
bool epd : 1;
bool hpd : 1;
+ bool tcma : 1;
bool using16k : 1;
bool using64k : 1;
} ARMVAParameters;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 038e52af4b..5a59fc4315 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9789,7 +9789,7 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va,
{
uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr;
uint32_t el = regime_el(env, mmu_idx);
- bool tbi, tbid, epd, hpd, using16k, using64k;
+ bool tbi, tbid, epd, hpd, tcma, using16k, using64k;
int select, tsz;
/* Bit 55 is always between the two regions, and is canonical for
@@ -9803,11 +9803,12 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState
*env, uint64_t va,
using16k = extract32(tcr, 15, 1);
if (mmu_idx == ARMMMUIdx_S2NS) {
/* VTCR_EL2 */
- tbi = tbid = hpd = false;
+ tbi = tbid = hpd = tcma = false;
} else {
tbi = extract32(tcr, 20, 1);
hpd = extract32(tcr, 24, 1);
tbid = extract32(tcr, 29, 1);
+ tcma = extract32(tcr, 30, 1);
}
epd = false;
} else if (!select) {
@@ -9818,6 +9819,7 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va,
tbi = extract64(tcr, 37, 1);
hpd = extract64(tcr, 41, 1);
tbid = extract64(tcr, 51, 1);
+ tcma = extract64(tcr, 57, 1);
} else {
int tg = extract32(tcr, 30, 2);
using16k = tg == 1;
@@ -9827,6 +9829,7 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va,
tbi = extract64(tcr, 38, 1);
hpd = extract64(tcr, 42, 1);
tbid = extract64(tcr, 52, 1);
+ tcma = extract64(tcr, 58, 1);
}
tsz = MIN(tsz, 39); /* TODO: ARMv8.4-TTST */
tsz = MAX(tsz, 16); /* TODO: ARMv8.2-LVA */
@@ -9838,6 +9841,7 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va,
.tbid = tbid,
.epd = epd,
.hpd = hpd,
+ .tcma = tcma,
.using16k = using16k,
.using64k = using64k,
};
--
2.17.2
- [Qemu-devel] [PATCH 00/17] target/arm: Implement ARMv8.5-MemTag, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 01/17] target/arm: Add MTE_ACTIVE to tb_flags, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 02/17] target/arm: Extract TCMA with ARMVAParameters,
Richard Henderson <=
- [Qemu-devel] [PATCH 03/17] target/arm: Add MTE system registers, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 04/17] target/arm: Fill in helper_mte_check, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 05/17] target/arm: Suppress tag check for sp+offset, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 06/17] target/arm: Implement the IRG instruction, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 07/17] target/arm: Implement ADDG, SUBG instructions, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 08/17] target/arm: Implement the GMI instruction, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 09/17] target/arm: Implement the SUBP instruction, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 10/17] target/arm: Implement LDG, STG, ST2G instructions, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 11/17] target/arm: Implement the STGP instruction, Richard Henderson, 2019/01/13
- [Qemu-devel] [PATCH 12/17] target/arm: Implement the LDGV and STGV instructions, Richard Henderson, 2019/01/13