[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 11/19] target/ppc: Move "wakeup reset" code to a sep
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH 11/19] target/ppc: Move "wakeup reset" code to a separate function |
Date: |
Mon, 28 Jan 2019 10:46:17 +0100 |
From: Benjamin Herrenschmidt <address@hidden>
This moves the code to handle waking up from the 0x100 vector
from powerpc_excp() to a separate function, as the former is
already way too big as it is.
No functional change.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
---
target/ppc/excp_helper.c | 75 ++++++++++++++++++++++------------------
1 file changed, 41 insertions(+), 34 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 97503193ef43..489a54f51b90 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -65,6 +65,46 @@ static inline void dump_syscall(CPUPPCState *env)
ppc_dump_gpr(env, 6), env->nip);
}
+static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp,
+ target_ulong *msr)
+{
+ /* We no longer are in a PM state */
+ env->in_pm_state = false;
+
+ /* Pretend to be returning from doze always as we don't lose state */
+ *msr |= (0x1ull << (63 - 47));
+
+ /* Machine checks are sent normally */
+ if (excp == POWERPC_EXCP_MCHECK) {
+ return excp;
+ }
+ switch (excp) {
+ case POWERPC_EXCP_RESET:
+ *msr |= 0x4ull << (63 - 45);
+ break;
+ case POWERPC_EXCP_EXTERNAL:
+ *msr |= 0x8ull << (63 - 45);
+ break;
+ case POWERPC_EXCP_DECR:
+ *msr |= 0x6ull << (63 - 45);
+ break;
+ case POWERPC_EXCP_SDOOR:
+ *msr |= 0x5ull << (63 - 45);
+ break;
+ case POWERPC_EXCP_SDOOR_HV:
+ *msr |= 0x3ull << (63 - 45);
+ break;
+ case POWERPC_EXCP_HV_MAINT:
+ *msr |= 0xaull << (63 - 45);
+ break;
+ default:
+ cpu_abort(cs, "Unsupported exception %d in Power Save mode\n",
+ excp);
+ }
+ return POWERPC_EXCP_RESET;
+}
+
+
/* Note that this function should be greatly optimized
* when called with a constant excp, from ppc_hw_interrupt
*/
@@ -102,40 +142,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
excp_model, int excp)
* P7/P8/P9
*/
if (env->in_pm_state) {
- env->in_pm_state = false;
-
- /* Pretend to be returning from doze always as we don't lose state */
- msr |= (0x1ull << (63 - 47));
-
- /* Non-machine check are routed to 0x100 with a wakeup cause
- * encoded in SRR1
- */
- if (excp != POWERPC_EXCP_MCHECK) {
- switch (excp) {
- case POWERPC_EXCP_RESET:
- msr |= 0x4ull << (63 - 45);
- break;
- case POWERPC_EXCP_EXTERNAL:
- msr |= 0x8ull << (63 - 45);
- break;
- case POWERPC_EXCP_DECR:
- msr |= 0x6ull << (63 - 45);
- break;
- case POWERPC_EXCP_SDOOR:
- msr |= 0x5ull << (63 - 45);
- break;
- case POWERPC_EXCP_SDOOR_HV:
- msr |= 0x3ull << (63 - 45);
- break;
- case POWERPC_EXCP_HV_MAINT:
- msr |= 0xaull << (63 - 45);
- break;
- default:
- cpu_abort(cs, "Unsupported exception %d in Power Save mode\n",
- excp);
- }
- excp = POWERPC_EXCP_RESET;
- }
+ excp = powerpc_reset_wakeup(cs, env, excp, &msr);
}
/* Exception targetting modifiers
--
2.20.1
- [Qemu-devel] [PATCH 10/19] target/ppc: Fix support for "STOP light" states on POWER9, (continued)
- [Qemu-devel] [PATCH 10/19] target/ppc: Fix support for "STOP light" states on POWER9, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 02/19] ppc: externalize ppc_get_vcpu_by_pir(), Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 04/19] ppc/pnv: xive: export the TIMA memory accessors, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 07/19] target/ppc: Make special ORs match x86 pause and don't generate on mttcg, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 06/19] target/ppc: Remove some #if 0'ed code, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 05/19] ppc/pnv: add XIVE support, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 13/19] target/ppc: Rename "in_pm_state" to "resume_as_sreset", Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 15/19] target/ppc: Detect erroneous condition in interrupt delivery, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 12/19] target/ppc: Disable ISA 2.06 PM instructions on POWER9, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 09/19] target/ppc: Don't clobber MSR:EE on PM instructions, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 11/19] target/ppc: Move "wakeup reset" code to a separate function,
Cédric Le Goater <=
- [Qemu-devel] [PATCH 14/19] target/ppc: Add POWER9 exception model, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 16/19] target/ppc: Add Hypervisor Virtualization Interrupt on POWER9, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 19/19] target/ppc: Add support for LPCR:HEIC on POWER9, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 18/19] ppc/xive: Make XIVE generate the proper interrupt types, Cédric Le Goater, 2019/01/28
- [Qemu-devel] [PATCH 17/19] target/ppc: Add POWER9 external interrupt model, Cédric Le Goater, 2019/01/28