[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 0/3] target/arm: Implement ARMv8.3-JSConv
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 0/3] target/arm: Implement ARMv8.3-JSConv |
Date: |
Mon, 4 Feb 2019 05:27:09 +0000 |
Two cleanups to surrounding code preceed the actual implementation.
I did not find the ARM FPToFixedJS pseudo-function particularly helpful,
so I mostly cribed off of the Alpha cvttq implementation. But I think
it all makes sense -- convert, produce the mod 2^32 result with NaN
getting INT32_MAX, set ZF iff the conversion is exact.
I've tested the aa64 version vs FVP with RISU. I need to adjust my
FVP configuration in order to test aa32.
r~
Richard Henderson (3):
target/arm: Force result size into dp after operation
target/arm: Restructure disas_fp_int_conv
target/arm: Implement ARMv8.3-JSConv
target/arm/cpu.h | 10 ++++
target/arm/helper.h | 2 +
target/arm/cpu.c | 1 +
target/arm/cpu64.c | 2 +
target/arm/op_helper.c | 91 ++++++++++++++++++++++++++++
target/arm/translate-a64.c | 120 +++++++++++++++++++++++--------------
target/arm/translate.c | 47 ++++++++++-----
7 files changed, 212 insertions(+), 61 deletions(-)
--
2.17.2
- [Qemu-devel] [PATCH 0/3] target/arm: Implement ARMv8.3-JSConv,
Richard Henderson <=
[Qemu-devel] [PATCH 1/3] target/arm: Force result size into dp after operation, Richard Henderson, 2019/02/04
[Qemu-devel] [PATCH 2/3] target/arm: Restructure disas_fp_int_conv, Richard Henderson, 2019/02/04
Re: [Qemu-devel] [PATCH 0/3] target/arm: Implement ARMv8.3-JSConv, no-reply, 2019/02/04