Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
c90f0b1c1f target/riscv: Remaining rvc insn reuse 32 bit translators
f4ec91a15f target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
7c79aff681 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
c3d9dcf346 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
b40b8bfcef target/riscv: Convert @cs_2 insns to share translation functions
e290faf869 target/riscv: Remove decode_RV32_64G()
4637bf24c6 target/riscv: Remove gen_system()
7c46cc508c target/riscv: Rename trans_arith to gen_arith
ba39f3cbee target/riscv: Remove manual decoding of RV32/64M insn
777a5ef2eb target/riscv: Remove shift and slt insn manual decoding
7144485ed8 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
f59c1ea746 target/riscv: Move gen_arith_imm() decoding into trans_* functions
b1ae2701d2 target/riscv: Remove manual decoding from gen_store()
4d141ae68d target/riscv: Remove manual decoding from gen_load()
3e53b0632d target/riscv: Remove manual decoding from gen_branch()
5fb2434794 target/riscv: Remove gen_jalr()
dfbe3100f0 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
cee70279b4 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
b2bc191262 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
92538ecf34 target/riscv: Convert RV priv insns to decodetree
b1870f1012 target/riscv: Convert RV64D insns to decodetree
edde2c7cae target/riscv: Convert RV32D insns to decodetree
71044a62c9 target/riscv: Convert RV64F insns to decodetree
faf08ac6d1 target/riscv: Convert RV32F insns to decodetree
aa0069bfc8 target/riscv: Convert RV64A insns to decodetree
2a0110d30f target/riscv: Convert RV32A insns to decodetree
f00df81137 target/riscv: Convert RVXM insns to decodetree
dc9c4675b4 target/riscv: Convert RVXI csr insns to decodetree
6dd33fa4a7 target/riscv: Convert RVXI fence insns to decodetree
9ba0da58a1 target/riscv: Convert RVXI arithmetic insns to decodetree
addb297559 target/riscv: Convert RV64I load/store insns to decodetree
938440b817 target/riscv: Convert RV32I load/store insns to decodetree
9e67d7855b target/riscv: Convert RVXI branch insns to decodetree
fcbe27fed9 target/riscv: Activate decodetree and implemnt LUI & AUIPC

=== OUTPUT BEGIN ===
1/34 Checking commit fcbe27fed9d5 (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1884:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 1/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/34 Checking commit 9e67d7855b83 (target/riscv: Convert RVXI branch insns to 
decodetree)
3/34 Checking commit 938440b817e3 (target/riscv: Convert RV32I load/store insns 
to decodetree)
4/34 Checking commit addb29755983 (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 4/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/34 Checking commit 9ba0da58a1b0 (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
6/34 Checking commit 6dd33fa4a7c4 (target/riscv: Convert RVXI fence insns to 
decodetree)
7/34 Checking commit dc9c4675b447 (target/riscv: Convert RVXI csr insns to 
decodetree)
8/34 Checking commit f00df811376d (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 169 lines checked

Patch 8/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/34 Checking commit 2a0110d30f3d (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 199 lines checked

Patch 9/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/34 Checking commit aa0069bfc8a0 (target/riscv: Convert RV64A insns to 
decodetree)
11/34 Checking commit faf08ac6d110 (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 442 lines checked

Patch 11/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/34 Checking commit 71044a62c9e4 (target/riscv: Convert RV64F insns to 
decodetree)
13/34 Checking commit edde2c7cae6b (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 398 lines checked

Patch 13/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/34 Checking commit b1870f101244 (target/riscv: Convert RV64D insns to 
decodetree)
15/34 Checking commit 92538ecf3408 (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 15/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
16/34 Checking commit b2bc19126209 (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#251: FILE: target/riscv/translate.c:1072:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 231 lines checked

Patch 16/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

17/34 Checking commit cee70279b40a (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
18/34 Checking commit dfbe3100f024 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
19/34 Checking commit 5fb2434794a8 (target/riscv: Remove gen_jalr())
20/34 Checking commit 3e53b0632d6f (target/riscv: Remove manual decoding from 
gen_branch())
21/34 Checking commit 4d141ae68d99 (target/riscv: Remove manual decoding from 
gen_load())
22/34 Checking commit b1ae2701d205 (target/riscv: Remove manual decoding from 
gen_store())
23/34 Checking commit f59c1ea746d6 (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
24/34 Checking commit 7144485ed80e (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
25/34 Checking commit 777a5ef2ebff (target/riscv: Remove shift and slt insn 
manual decoding)
26/34 Checking commit ba39f3cbeea0 (target/riscv: Remove manual decoding of 
RV32/64M insn)
27/34 Checking commit 7c46cc508cef (target/riscv: Rename trans_arith to 
gen_arith)
28/34 Checking commit 4637bf24c671 (target/riscv: Remove gen_system())
29/34 Checking commit e290faf86918 (target/riscv: Remove decode_RV32_64G())
30/34 Checking commit b40b8bfcef10 (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:548:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 30/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

31/34 Checking commit c3d9dcf3466f (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
32/34 Checking commit 7c79aff68154 (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 32/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
33/34 Checking commit f4ec91a15f35 (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
34/34 Checking commit c90f0b1c1f4b (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden