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Re: [Qemu-devel] [PATCH v3] target/mips: Fix minor bug in FPU


From: Aleksandar Markovic
Subject: Re: [Qemu-devel] [PATCH v3] target/mips: Fix minor bug in FPU
Date: Tue, 19 Mar 2019 19:21:25 +0000

> From: Mateja Marjanovic <address@hidden>
> Subject: [PATCH v3] target/mips: Fix minor bug in FPU
> 
> From: Mateja Marjanovic <address@hidden>
> 
> Wrong type of NaN was generated for IEEE 754-2008 by MADDF.<D|S> and
> MSUBF.<D|S> instructions when the arguments were (inf, zero, nan) or
> (zero, inf, nan).
> These instructions were tested and the results match with the results
> of the machine that has a MIPS64 r6 cpu.
> 
> Signed-off-by: Mateja Marjanovic <address@hidden>
> ---

Mateja,

The commit message is missing information on the reference source
of information, that you placed in the cover letter. In my opinion, this is
an important peace of information for anybody seeing and examining
this patch in future, so please submit a new version of the patch as an
isolated patch and updated commit message.

Thanks in advance,
Aleksandar

>  fpu/softfloat-specialize.h | 24 ++++++++++++++++--------
>  1 file changed, 16 insertions(+), 8 deletions(-)
> 
> diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
> index 16c0bcb..7b88957 100644
> --- a/fpu/softfloat-specialize.h
> +++ b/fpu/softfloat-specialize.h
> @@ -495,15 +495,15 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass 
> b_cls, FloatClass > c_cls,
>          return 1;
>      }
>  #elif defined(TARGET_MIPS)
> -    /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
> -     * the default NaN
> -     */
> -    if (infzero) {
> -        float_raise(float_flag_invalid, status);
> -        return 3;
> -    }
> -
>      if (snan_bit_is_one(status)) {
> +        /*
> +         * For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan)
> +         * case sets InvalidOp and returns the default NaN
> +         */
> +        if (infzero) {
> +            float_raise(float_flag_invalid, status);
> +            return 3;
> +        }
>          /* Prefer sNaN over qNaN, in the a, b, c order. */
>          if (is_snan(a_cls)) {
>              return 0;
> @@ -519,6 +519,14 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass 
> b_cls, FloatClass > c_cls,
>              return 2;
>          }
>      } else {
> +        /*
> +         * For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan)
> +         * case sets InvalidOp and returns the input value 'c'
> +         */
> +        if (infzero) {
> +            float_raise(float_flag_invalid, status);
> +            return 2;
> +        }
>          /* Prefer sNaN over qNaN, in the c, a, b order. */
>          if (is_snan(c_cls)) {
>              return 2;
> --
> 2.7.4
> 



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