Re: [Qemu-devel] [PATCH] target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max

[Peter Maydell]

On Mon, 25 Mar 2019 at 16:13, Richard Henderson
<address@hidden> wrote:
>
> Fixes: https://bugs.launchpad.net/bugs/1821430
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target/arm/cpu.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 96f0ff0ec7..d9b8658921 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -2025,6 +2025,11 @@ static void arm_max_initfn(Object *obj)
>              t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1);
>              cpu->isar.id_isar6 = t;
>
> +            t = cpu->isar.mvfr2;
> +            t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */
> +            t = FIELD_DP32(t, MVFR2, FPMISC, 4);   /* FP MaxNum */
> +            cpu->isar.mvfr2 = t;
> +
>              t = cpu->id_mmfr4;
>              t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
>              cpu->id_mmfr4 = t;
> --
> 2.17.1



Applied to target-arm.next, thanks.

-- PMM