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Re: [Qemu-devel] [PATCH 04/38] tcg: Support cross-class moves without in
From: |
David Hildenbrand |
Subject: |
Re: [Qemu-devel] [PATCH 04/38] tcg: Support cross-class moves without instruction support |
Date: |
Tue, 23 Apr 2019 10:29:17 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 |
On 20.04.19 09:34, Richard Henderson wrote:
> PowerPC Altivec does not support direct moves between vector registers
> and general registers. So when tcg_out_mov fails, we can use the
> backing memory for the temporary to perform the move.
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> tcg/tcg.c | 25 ++++++++++++++++++++++---
> 1 file changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index b083faacd2..d3dcfe3dca 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -3373,7 +3373,18 @@ static void tcg_reg_alloc_mov(TCGContext *s, const
> TCGOp *op)
> ots->indirect_base);
> }
> if (!tcg_out_mov(s, otype, ots->reg, ts->reg)) {
> - abort();
> + /* Cross register class move not supported.
> + Store the source register into the destination slot
> + and leave the destination temp as TEMP_VAL_MEM. */
> + assert(!ots->fixed_reg);
> + if (!ts->mem_allocated) {
> + temp_allocate_frame(s, ots);
> + }
> + tcg_out_st(s, ts->type, ts->reg,
> + ots->mem_base->reg, ots->mem_offset);
> + ots->mem_coherent = 1;
> + temp_free_or_dead(s, ots, -1);
> + return;
> }
> }
> ots->val_type = TEMP_VAL_REG;
> @@ -3475,7 +3486,11 @@ static void tcg_reg_alloc_op(TCGContext *s, const
> TCGOp *op)
> reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs,
> o_preferred_regs, ts->indirect_base);
> if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {
> - abort();
> + /* Cross register class move not supported. Sync the
> + temp back to its slot and load from there. */
> + temp_sync(s, ts, i_allocated_regs, 0, 0);
> + tcg_out_ld(s, ts->type, reg,
> + ts->mem_base->reg, ts->mem_offset);
> }
> }
> new_args[i] = reg;
> @@ -3634,7 +3649,11 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp
> *op)
> if (ts->reg != reg) {
> tcg_reg_free(s, reg, allocated_regs);
> if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {
> - abort();
> + /* Cross register class move not supported. Sync the
> + temp back to its slot and load from there. */
> + temp_sync(s, ts, allocated_regs, 0, 0);
> + tcg_out_ld(s, ts->type, reg,
> + ts->mem_base->reg, ts->mem_offset);
> }
> }
> } else {
>
Acked-by: David Hildenbrand <address@hidden>
--
Thanks,
David / dhildenb
- [Qemu-devel] [PATCH 00/38] tcg vector improvements, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 01/38] target/arm: Fill in .opc for cmtst_op, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 02/38] tcg: Assert fixed_reg is read-only, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 04/38] tcg: Support cross-class moves without instruction support, Richard Henderson, 2019/04/20
- Re: [Qemu-devel] [PATCH 04/38] tcg: Support cross-class moves without instruction support,
David Hildenbrand <=
- [Qemu-devel] [PATCH 03/38] tcg: Return bool success from tcg_out_mov, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 05/38] tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 06/38] tcg: Promote tcg_out_{dup, dupi}_vec to backend interface, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 08/38] tcg: Add tcg_out_dupm_vec to the backend interface, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 10/38] tcg/aarch64: Implement tcg_out_dupm_vec, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 07/38] tcg: Manually expand INDEX_op_dup_vec, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 09/38] tcg/i386: Implement tcg_out_dupm_vec, Richard Henderson, 2019/04/20