[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 06/15] arm: aspeed: Set SDRAM size
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/15] arm: aspeed: Set SDRAM size |
Date: |
Tue, 7 May 2019 13:00:02 +0100 |
From: Joel Stanley <address@hidden>
We currently use Qemu's default of 128MB. As we know how much ram each
machine ships with, make it easier on users by setting a default.
It can still be overridden with -m on the command line.
Signed-off-by: Joel Stanley <address@hidden>
Reviewed-by: Andrew Jeffery <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 325c091d09e..02073a6b4d6 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -22,6 +22,7 @@ typedef struct AspeedBoardConfig {
const char *spi_model;
uint32_t num_cs;
void (*i2c_init)(AspeedBoardState *bmc);
+ uint32_t ram;
} AspeedBoardConfig;
#define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed")
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 1c23ebd9925..29d225ed140 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -25,6 +25,7 @@
#include "sysemu/block-backend.h"
#include "hw/loader.h"
#include "qemu/error-report.h"
+#include "qemu/units.h"
static struct arm_boot_info aspeed_board_binfo = {
.board_id = -1, /* device-tree-only board */
@@ -331,6 +332,9 @@ static void aspeed_machine_class_init(ObjectClass *oc, void
*data)
mc->no_floppy = 1;
mc->no_cdrom = 1;
mc->no_parallel = 1;
+ if (board->ram) {
+ mc->default_ram_size = board->ram;
+ }
amc->board = board;
}
@@ -352,6 +356,7 @@ static const AspeedBoardConfig aspeed_boards[] = {
.spi_model = "mx25l25635e",
.num_cs = 1,
.i2c_init = palmetto_bmc_i2c_init,
+ .ram = 256 * MiB,
}, {
.name = MACHINE_TYPE_NAME("ast2500-evb"),
.desc = "Aspeed AST2500 EVB (ARM1176)",
@@ -361,6 +366,7 @@ static const AspeedBoardConfig aspeed_boards[] = {
.spi_model = "mx25l25635e",
.num_cs = 1,
.i2c_init = ast2500_evb_i2c_init,
+ .ram = 512 * MiB,
}, {
.name = MACHINE_TYPE_NAME("romulus-bmc"),
.desc = "OpenPOWER Romulus BMC (ARM1176)",
@@ -370,6 +376,7 @@ static const AspeedBoardConfig aspeed_boards[] = {
.spi_model = "mx66l1g45g",
.num_cs = 2,
.i2c_init = romulus_bmc_i2c_init,
+ .ram = 512 * MiB,
}, {
.name = MACHINE_TYPE_NAME("witherspoon-bmc"),
.desc = "OpenPOWER Witherspoon BMC (ARM1176)",
@@ -379,6 +386,7 @@ static const AspeedBoardConfig aspeed_boards[] = {
.spi_model = "mx66l1g45g",
.num_cs = 2,
.i2c_init = witherspoon_bmc_i2c_init,
+ .ram = 512 * MiB,
},
};
--
2.20.1
- [Qemu-devel] [PULL 00/15] target-arm queue, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 02/15] pflash_cfi01: New pflash_cfi01_legacy_drive(), Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 01/15] pc: Rearrange pc_system_firmware_init()'s legacy -drive loop, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 05/15] arm: Allow system registers for KVM guests to be changed by QEMU code, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 09/15] util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 04/15] hw/arm/raspi: Diagnose requests for too much RAM, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 07/15] QEMU_PACKED: Remove gcc_struct attribute in Windows non x86 targets, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 10/15] osdep: Fix mingw compilation regarding stdio formats, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 08/15] qga: Fix mingw compilation warnings on enum conversion, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 06/15] arm: aspeed: Set SDRAM size,
Peter Maydell <=
- [Qemu-devel] [PULL 11/15] hw/arm/armv7m_nvic: Check subpriority in nvic_recompute_state_secure(), Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 03/15] hw/arm/virt: Support firmware configuration with -blockdev, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 13/15] hw/intc/armv7m_nvic: Don't enable ARMV7M_EXCP_DEBUG from reset, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 14/15] target/arm: Implement XPSR GE bits, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 15/15] target/arm: Stop using variable length array in dc_zva, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 12/15] hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0, Peter Maydell, 2019/05/07
- Re: [Qemu-devel] [PULL 00/15] target-arm queue, Peter Maydell, 2019/05/08