[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 15/15] target/arm: Stop using variable length array i
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 15/15] target/arm: Stop using variable length array in dc_zva |
Date: |
Tue, 7 May 2019 13:00:11 +0100 |
Currently the dc_zva helper function uses a variable length
array. In fact we know (as the comment above remarks) that
the length of this array is bounded because the architecture
limits the block size and QEMU limits the target page size.
Use a fixed array size and assert that we don't run off it.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
---
target/arm/helper.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index b9745a42bab..1e6eb0d0f36 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1,4 +1,5 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "target/arm/idau.h"
#include "trace.h"
#include "cpu.h"
@@ -13130,14 +13131,17 @@ void HELPER(dc_zva)(CPUARMState *env, uint64_t
vaddr_in)
* We know that in fact for any v8 CPU the page size is at least 4K
* and the block size must be 2K or less, but TARGET_PAGE_SIZE is only
* 1K as an artefact of legacy v5 subpage support being present in the
- * same QEMU executable.
+ * same QEMU executable. So in practice the hostaddr[] array has
+ * two entries, given the current setting of TARGET_PAGE_BITS_MIN.
*/
int maxidx = DIV_ROUND_UP(blocklen, TARGET_PAGE_SIZE);
- void *hostaddr[maxidx];
+ void *hostaddr[DIV_ROUND_UP(2 * KiB, 1 << TARGET_PAGE_BITS_MIN)];
int try, i;
unsigned mmu_idx = cpu_mmu_index(env, false);
TCGMemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
+ assert(maxidx <= ARRAY_SIZE(hostaddr));
+
for (try = 0; try < 2; try++) {
for (i = 0; i < maxidx; i++) {
--
2.20.1
- [Qemu-devel] [PULL 09/15] util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64, (continued)
- [Qemu-devel] [PULL 09/15] util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 04/15] hw/arm/raspi: Diagnose requests for too much RAM, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 07/15] QEMU_PACKED: Remove gcc_struct attribute in Windows non x86 targets, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 10/15] osdep: Fix mingw compilation regarding stdio formats, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 08/15] qga: Fix mingw compilation warnings on enum conversion, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 06/15] arm: aspeed: Set SDRAM size, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 11/15] hw/arm/armv7m_nvic: Check subpriority in nvic_recompute_state_secure(), Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 03/15] hw/arm/virt: Support firmware configuration with -blockdev, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 13/15] hw/intc/armv7m_nvic: Don't enable ARMV7M_EXCP_DEBUG from reset, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 14/15] target/arm: Implement XPSR GE bits, Peter Maydell, 2019/05/07
- [Qemu-devel] [PULL 15/15] target/arm: Stop using variable length array in dc_zva,
Peter Maydell <=
- [Qemu-devel] [PULL 12/15] hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0, Peter Maydell, 2019/05/07
- Re: [Qemu-devel] [PULL 00/15] target-arm queue, Peter Maydell, 2019/05/08