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[Qemu-devel] [PATCH 56/67] target/arm: Convert T16, Reverse bytes
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 56/67] target/arm: Convert T16, Reverse bytes |
Date: |
Fri, 26 Jul 2019 10:50:21 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 18 +++---------------
target/arm/t16.decode | 9 +++++++++
2 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 8f2adbbc7d..c9386ceefb 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10616,7 +10616,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t
insn)
static void disas_thumb_insn(DisasContext *s, uint32_t insn)
{
- uint32_t val, op, rm, rn, rd, shift, cond;
+ uint32_t val, op, rm, rd, shift, cond;
int32_t offset;
int i;
TCGv_i32 tmp;
@@ -10815,20 +10815,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t
insn)
break;
}
- /* Otherwise this is rev */
- ARCH(6);
- rn = (insn >> 3) & 0x7;
- rd = insn & 0x7;
- tmp = load_reg(s, rn);
- switch (op1) {
- case 0: tcg_gen_bswap32_i32(tmp, tmp); break;
- case 1: gen_rev16(tmp, tmp); break;
- case 3: gen_revsh(tmp, tmp); break;
- default:
- g_assert_not_reached();
- }
- store_reg(s, rd, tmp);
- break;
+ /* Otherwise this is rev, in decodetree */
+ goto illegal_op;
}
case 6: /* setend, cps; in decodetree */
diff --git a/target/arm/t16.decode b/target/arm/t16.decode
index f43ea6ce20..8864f89a81 100644
--- a/target/arm/t16.decode
+++ b/target/arm/t16.decode
@@ -24,6 +24,7 @@
&s_rri_rot !extern s rn rd imm rot
&s_rrrr !extern s rd rn rm ra
&rrr_rot !extern rd rn rm rot
+&rr !extern rd rm
&ri !extern rd imm
&r !extern rm
&ldst_rr !extern p w u rn rt rm shimm shtype
@@ -195,3 +196,11 @@ SETEND 1011 0110 010 1 E:1 000 &setend
CPS_v6m 1011 0110 011 im:1 00 I:1 F:1
CPS 1011 0110 011 . 0 A:1 I:1 F:1 &cps mode=0 M=0 %imod
}
+
+# Reverse bytes
+
+@rdm .... .... .. rm:3 rd:3 &rr
+
+REV 1011 1010 00 ... ... @rdm
+REV16 1011 1010 01 ... ... @rdm
+REVSH 1011 1010 11 ... ... @rdm
--
2.17.1
- [Qemu-devel] [PATCH 53/67] target/arm: Convert T16 adjust sp (immediate), (continued)
- [Qemu-devel] [PATCH 53/67] target/arm: Convert T16 adjust sp (immediate), Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 55/67] target/arm: Convert T16, Change processor state, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 11/67] target/arm: Add stubs for aa32 decodetree, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 61/67] target/arm: Convert T16, shift immediate, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 64/67] target/arm: Convert T16, long branches, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 67/67] target/arm: Merge gen_bx_im into trans_BLX_i, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 59/67] target/arm: Convert T16, Conditional branches, Supervisor call, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 58/67] target/arm: Convert T16, push and pop, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 57/67] target/arm: Convert T16, nop hints, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 65/67] target/arm: Clean up disas_thumb_insn, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 56/67] target/arm: Convert T16, Reverse bytes,
Richard Henderson <=
- [Qemu-devel] [PATCH 54/67] target/arm: Convert T16, extract, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 52/67] target/arm: Convert T16 add, compare, move (two high registers), Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 63/67] target/arm: Convert T16, Unconditional branch, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 60/67] target/arm: Convert T16, Miscellaneous 16-bit instructions, Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 62/67] target/arm: Convert T16, load (literal), Richard Henderson, 2019/07/26
- [Qemu-devel] [PATCH 66/67] target/arm: Move singlestep check from gen_jmp to gen_goto_tb, Richard Henderson, 2019/07/26
- Re: [Qemu-devel] [PATCH 00/67] target/arm: Convert aa32 base isa to decodetree, no-reply, 2019/07/26