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[PULL 13/15] arm/gicv3: update virtual irq state after IAR register read
From: |
Peter Maydell |
Subject: |
[PULL 13/15] arm/gicv3: update virtual irq state after IAR register read |
Date: |
Fri, 17 Jan 2020 14:28:14 +0000 |
From: Jeff Kubascik <address@hidden>
The IAR0/IAR1 register is used to acknowledge an interrupt - a read of the
register activates the highest priority pending interrupt and provides its
interrupt ID. Activating an interrupt can change the CPU's virtual interrupt
state - this change makes sure the virtual irq state is updated.
Signed-off-by: Jeff Kubascik <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/intc/arm_gicv3_cpuif.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
index a254b0ce875..08e000e33c6 100644
--- a/hw/intc/arm_gicv3_cpuif.c
+++ b/hw/intc/arm_gicv3_cpuif.c
@@ -664,6 +664,9 @@ static uint64_t icv_iar_read(CPUARMState *env, const
ARMCPRegInfo *ri)
trace_gicv3_icv_iar_read(ri->crm == 8 ? 0 : 1,
gicv3_redist_affid(cs), intid);
+
+ gicv3_cpuif_virt_update(cs);
+
return intid;
}
--
2.20.1
- [PULL 05/15] tests/boot_linux_console: Add initrd test for the CubieBoard, (continued)
- [PULL 05/15] tests/boot_linux_console: Add initrd test for the CubieBoard, Peter Maydell, 2020/01/17
- [PULL 08/15] hw/arm/allwinner-a10: Simplify by passing IRQs with qdev_pass_gpios(), Peter Maydell, 2020/01/17
- [PULL 07/15] hw/arm/allwinner-a10: Move SoC definitions out of header, Peter Maydell, 2020/01/17
- [PULL 06/15] tests/boot_linux_console: Add a SD card test for the CubieBoard, Peter Maydell, 2020/01/17
- [PULL 09/15] hw/arm/allwinner-a10: Remove local qemu_irq variables, Peter Maydell, 2020/01/17
- [PULL 10/15] target/arm/arm-semi: fix SYS_OPEN to return nonzero filehandle, Peter Maydell, 2020/01/17
- [PULL 12/15] target/arm: adjust program counter for wfi exception in AArch32, Peter Maydell, 2020/01/17
- [PULL 11/15] i.MX: add an emulation for RNGC, Peter Maydell, 2020/01/17
- [PULL 14/15] target/arm: Return correct IL bit in merge_syn_data_abort, Peter Maydell, 2020/01/17
- [PULL 15/15] target/arm: Set ISSIs16Bit in make_issinfo, Peter Maydell, 2020/01/17
- [PULL 13/15] arm/gicv3: update virtual irq state after IAR register read,
Peter Maydell <=
- Re: [PULL 00/15] target-arm queue, Peter Maydell, 2020/01/17