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[PULL 35/48] target/arm: check TGE and E2H flags for EL0 pauth traps
From: |
Peter Maydell |
Subject: |
[PULL 35/48] target/arm: check TGE and E2H flags for EL0 pauth traps |
Date: |
Fri, 7 Feb 2020 14:33:30 +0000 |
From: Alex Bennée <address@hidden>
According to ARM ARM we should only trap from the EL1&0 regime.
Tested-by: Alex Bennée <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/pauth_helper.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/arm/pauth_helper.c b/target/arm/pauth_helper.c
index e0c401c4a9e..9746e32bf81 100644
--- a/target/arm/pauth_helper.c
+++ b/target/arm/pauth_helper.c
@@ -371,7 +371,10 @@ static void pauth_check_trap(CPUARMState *env, int el,
uintptr_t ra)
if (el < 2 && arm_feature(env, ARM_FEATURE_EL2)) {
uint64_t hcr = arm_hcr_el2_eff(env);
bool trap = !(hcr & HCR_API);
- /* FIXME: ARMv8.1-VHE: trap only applies to EL1&0 regime. */
+ if (el == 0) {
+ /* Trap only applies to EL1&0 regime. */
+ trap &= (hcr & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE);
+ }
/* FIXME: ARMv8.3-NV: HCR_NV trap takes precedence for ERETA[AB]. */
if (trap) {
pauth_trap(env, 2, ra);
--
2.20.1
- [PULL 25/48] target/arm: Update ctr_el0_access for EL2, (continued)
- [PULL 25/48] target/arm: Update ctr_el0_access for EL2, Peter Maydell, 2020/02/07
- [PULL 26/48] target/arm: Add the hypervisor virtual counter, Peter Maydell, 2020/02/07
- [PULL 27/48] target/arm: Update timer access for VHE, Peter Maydell, 2020/02/07
- [PULL 28/48] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE, Peter Maydell, 2020/02/07
- [PULL 31/48] target/arm: Flush tlb for ASID changes in EL2&0 translation regime, Peter Maydell, 2020/02/07
- [PULL 29/48] target/arm: Add VHE system register redirection and aliasing, Peter Maydell, 2020/02/07
- [PULL 30/48] target/arm: Add VHE timer register redirection and aliasing, Peter Maydell, 2020/02/07
- [PULL 32/48] target/arm: Flush tlbs for E2&0 translation regime, Peter Maydell, 2020/02/07
- [PULL 33/48] target/arm: Update arm_phys_excp_target_el for TGE, Peter Maydell, 2020/02/07
- [PULL 34/48] target/arm: Update {fp,sve}_exception_el for VHE, Peter Maydell, 2020/02/07
- [PULL 35/48] target/arm: check TGE and E2H flags for EL0 pauth traps,
Peter Maydell <=
- [PULL 36/48] target/arm: Update get_a64_user_mem_index for VHE, Peter Maydell, 2020/02/07
- [PULL 38/48] target/arm: Enable ARMv8.1-VHE in -cpu max, Peter Maydell, 2020/02/07
- [PULL 37/48] target/arm: Update arm_cpu_do_interrupt_aarch64 for VHE, Peter Maydell, 2020/02/07
- [PULL 40/48] target/arm: Pass more cpu state to arm_excp_unmasked, Peter Maydell, 2020/02/07
- [PULL 41/48] target/arm: Use bool for unmasked in arm_excp_unmasked, Peter Maydell, 2020/02/07
- [PULL 43/48] bcm2835_dma: Fix the ylen loop in TD mode, Peter Maydell, 2020/02/07
- [PULL 39/48] target/arm: Move arm_excp_unmasked to cpu.c, Peter Maydell, 2020/02/07
- [PULL 42/48] target/arm: Raise only one interrupt in arm_cpu_exec_interrupt, Peter Maydell, 2020/02/07
- [PULL 44/48] bcm2835_dma: Re-initialize xlen in TD mode, Peter Maydell, 2020/02/07
- [PULL 45/48] docs/arm-cpu-features: Make kvm-no-adjvtime comment clearer, Peter Maydell, 2020/02/07