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Re: [PATCH 13/13] target/arm: Correct handling of PMCR_EL0.LC bit

From: Richard Henderson
Subject: Re: [PATCH 13/13] target/arm: Correct handling of PMCR_EL0.LC bit
Date: Tue, 11 Feb 2020 10:55:16 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1

On 2/11/20 9:37 AM, Peter Maydell wrote:
> The LC bit in the PMCR_EL0 register is supposed to be:
>  * read/write
>  * RES1 on an AArch64-only implementation
>  * an architecturally UNKNOWN value on reset
> (and use of LC==0 by software is deprecated).
> We were implementing it incorrectly as read-only always zero,
> though we do have all the code needed to test it and behave
> accordingly.
> Instead make it a read-write bit which resets to 1 always, which
> satisfies all the architectural requirements above.
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  target/arm/helper.c | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


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