Re: [PATCH] hw/ide: Remove status register read side effect

[jasper.lowell]

> cmd646_update_irq() only seems to raise PCI interrupt, should it also
> have 
> an option to use INT 14 and 15 in legacy mode similar to what my
> patch 
> does for via-ide?

Looking through /qemu/hw/ide/cmd646.c it doesn't look like QEMU has
support for legacy mode. At the very least, it looks like we default to
PCI native mode:

static void pci_cmd646_ide_realize(PCIDevice *dev, Error **errp)
        ...
        pci_conf[PCI_CLASS_PROG] = 0x8f;
        ...

To add support for legacy mode it would require changing
cmd646_update_irq() and maybe cmd646_set_irq() so that interrupts are
conditionally raised on IRQ14 and/or IRQ15 when the ports are in legacy
mode.

Thanks,
Jasper Lowell.


On Sun, 2020-03-01 at 19:02 +0100, BALATON Zoltan wrote:
> Hello,
> 
> On Wed, 26 Feb 2020, address@hidden wrote:
> > According to the CMD646U2 specification:
> > "When an IDE port is in PCI IDE Legacy Mode, the PCI646U2 is
> > compatible
> > with standard ISA IDE. The IDE task file registers are mapped to
> > the
> > standard ISA port addresses, and IDE drive interrupts occur at
> > IRQ14
> > (primary) or IRQ15 (secondary)."
> > 
> > In legacy mode, IRQ14 and IRQ15 mirror the state of INTRQ on each
> > of
> > the selected IDE devices. QEMU appears to emulate this correctly.
> 
> So CMD646 also seems to have a legacy mode. I've also seen a CMD
> PCI0640B 
> spec which is proabably a similar chip which says for interrupt
> handling:
> 
> "When DSA1 is pulled low during reset, both IDE ports are in PCI IDE 
> Legacy Mode. When DSA1 has no pull-down during reset, each IDE port
> may 
> independently be set to PCI IDE Legacy Mode or Native Mode via the 
> Programming Interface Byte (configuration register PROGIF, Index 9h).
> When 
> an IDE port is in PCI IDE Legacy Mode, the PCI-0640B is compatible
> with 
> standard ISA IDE. The IDE task file registers are mapped to the
> standard 
> ISA port addresses, and IDE drive interrupts occur at IRQ14 (primary)
> or 
> IRQ15 (secondary).
> 
> When an IDE port is in PCI IDE Native Mode, the IDE task file
> registers 
> may be mapped to non-standard port addresses, and IDE drive
> interrupts 
> occur at PCI INTA. Therefore, if both IDE ports are in PCI IDE
> Native 
> Mode, drive interrupts from both IDE ports are multiplexed into PCI
> INTA. 
> In this case, the interrupt status bits must be polled to determine
> which 
> IDE port generated the interrupt, or whether the interrupt was
> generated 
> by another PCI device sharing INTA on the bus."
> 
> This same explanation also appears in CMD646 doc. So what mode is
> the 
> PROG_IF config reg set to and do the interrupts raised match that? 
> cmd646_update_irq() only seems to raise PCI interrupt, should it also
> have 
> an option to use INT 14 and 15 in legacy mode similar to what my
> patch 
> does for via-ide?
> 
> Additionally Solaris may also get info from the OF device tree so
> that may 
> also have to match the device config.
> 
> I'm not sure this helps but I don't have any better idea.
> 
> Regards,
> BALATON Zoltan
>