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Re: [PATCH v7 02/42] target/arm: Improve masking of SCR RES0 bits
From: |
Peter Maydell |
Subject: |
Re: [PATCH v7 02/42] target/arm: Improve masking of SCR RES0 bits |
Date: |
Thu, 18 Jun 2020 11:50:18 +0100 |
On Wed, 3 Jun 2020 at 02:13, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Protect reads of aa64 id registers with ARM_CP_STATE_AA64.
> Use this as a simpler test than arm_el_is_aa64, since EL3
> cannot change mode.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM