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Re: [PATCH v7 03/42] target/arm: Add support for MTE to SCTLR_ELx
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v7 03/42] target/arm: Add support for MTE to SCTLR_ELx |
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Date: |
Thu, 18 Jun 2020 11:08:02 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 |
On 6/18/20 3:52 AM, Peter Maydell wrote:
>> + if (ri->state == ARM_CP_STATE_AA64 && !cpu_isar_feature(aa64_mte, cpu))
>> {
>> + if (ri->opc1 == 6) { /* SCTLR_EL3 */
>> + value &= ~(SCTLR_ITFSB | SCTLR_TCF | SCTLR_ATA);
>> + } else {
>> + value &= ~(SCTLR_ITFSB | SCTLR_TCF0 | SCTLR_TCF |
>> + SCTLR_ATA0 | SCTLR_ATA);
>> + }
>
> Doesn't SCTLR_EL2 have the same "no ATA0 and no TCF0" that
> SCTLR_EL3 does?
No. With HCR.{E2H,TGE} = '11', those fields are present.
r~
- [PATCH v7 00/42] target/arm: Implement ARMv8.5-MemTag, system mode, Richard Henderson, 2020/06/02
- [PATCH v7 04/42] target/arm: Add support for MTE to HCR_EL2 and SCR_EL3, Richard Henderson, 2020/06/02
- [PATCH v7 06/42] target/arm: Add DISAS_UPDATE_NOCHAIN, Richard Henderson, 2020/06/02
- [PATCH v7 05/42] target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT, Richard Henderson, 2020/06/02
- [PATCH v7 07/42] target/arm: Add MTE system registers, Richard Henderson, 2020/06/02
- [PATCH v7 08/42] target/arm: Add MTE bits to tb_flags, Richard Henderson, 2020/06/02