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[PULL 57/57] target/arm: Enable MTE
From: |
Peter Maydell |
Subject: |
[PULL 57/57] target/arm: Enable MTE |
Date: |
Fri, 26 Jun 2020 16:14:24 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
We now implement all of the components of MTE, without actually
supporting any tagged memory. All MTE instructions will work,
trivially, so we can enable support.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-46-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu64.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index a0c1d8894b7..a2f4733eed6 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -654,6 +654,11 @@ static void aarch64_max_initfn(Object *obj)
t = cpu->isar.id_aa64pfr1;
t = FIELD_DP64(t, ID_AA64PFR1, BT, 1);
+ /*
+ * Begin with full support for MTE; will be downgraded to MTE=1
+ * during realize if the board provides no tag memory.
+ */
+ t = FIELD_DP64(t, ID_AA64PFR1, MTE, 2);
cpu->isar.id_aa64pfr1 = t;
t = cpu->isar.id_aa64mmfr1;
--
2.20.1
- [PULL 51/57] target/arm: Implement data cache set allocation tags, (continued)
- [PULL 51/57] target/arm: Implement data cache set allocation tags, Peter Maydell, 2020/06/26
- [PULL 50/57] target/arm: Complete TBI clearing for user-only for SVE, Peter Maydell, 2020/06/26
- [PULL 46/57] target/arm: Add mte helpers for sve scalar + int stores, Peter Maydell, 2020/06/26
- [PULL 47/57] target/arm: Add mte helpers for sve scalar + int ff/nf loads, Peter Maydell, 2020/06/26
- [PULL 52/57] target/arm: Set PSTATE.TCO on exception entry, Peter Maydell, 2020/06/26
- [PULL 49/57] target/arm: Add mte helpers for sve scatter/gather memory ops, Peter Maydell, 2020/06/26
- [PULL 53/57] target/arm: Always pass cacheattr to get_phys_addr, Peter Maydell, 2020/06/26
- [PULL 54/57] target/arm: Cache the Tagged bit for a page in MemTxAttrs, Peter Maydell, 2020/06/26
- [PULL 55/57] target/arm: Create tagged ram when MTE is enabled, Peter Maydell, 2020/06/26
- [PULL 56/57] target/arm: Add allocation tag storage for system mode, Peter Maydell, 2020/06/26
- [PULL 57/57] target/arm: Enable MTE,
Peter Maydell <=
- Re: [PULL 00/57] target-arm queue, no-reply, 2020/06/26
- Re: [PULL 00/57] target-arm queue, no-reply, 2020/06/26
- Re: [PULL 00/57] target-arm queue, Peter Maydell, 2020/06/26