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Re: [RFC v2 18/76] target/riscv: introduce more imm value modes in trans
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From: |
Richard Henderson |
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Subject: |
Re: [RFC v2 18/76] target/riscv: introduce more imm value modes in translator functions |
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Date: |
Wed, 22 Jul 2020 11:08:32 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 7/22/20 2:15 AM, frank.chang@sifive.com wrote:
> +#define IMM_ZX 0 /* Zero-extended */
> +#define IMM_SX 1 /* Sign-extended */
> +#define IMM_TRUNC_SEW 2 /* Truncate to log(SEW) bits */
> +#define IMM_TRUNC_2SEW 3 /* Truncate to log(2*SEW) bits */
Please use an enum.
> + case IMM_TRUNC_SEW:
> + src1 = tcg_const_tl(
> + extract64(imm, 0, 5) & ((1 << (s->sew + 3)) - 1) & 0x1f);
> + break;
> + case IMM_TRUNC_2SEW:
> + src1 = tcg_const_tl(
> + extract64(imm, 0, 5) & ((2 << (s->sew + 3)) - 1) & 0x1f);
> + break;
Either the extract or the "& 0x1f" is redundant. Remove one.
It would be worth splitting the integer arithmetic out to a helper function so
that you don't have to replicate it again in do_opivi_gvec.
r~
- [RFC v2 14/76] target/riscv: rvv-0.9: remove MLEN calculations, (continued)
- [RFC v2 14/76] target/riscv: rvv-0.9: remove MLEN calculations, frank . chang, 2020/07/22
- [RFC v2 15/76] target/riscv: rvv-0.9: add fractional LMUL, frank . chang, 2020/07/22
- [RFC v2 16/76] target/riscv: rvv-0.9: add VMA and VTA, frank . chang, 2020/07/22
- [RFC v2 17/76] target/riscv: rvv-0.9: update check functions, frank . chang, 2020/07/22
- [RFC v2 18/76] target/riscv: introduce more imm value modes in translator functions, frank . chang, 2020/07/22
- Re: [RFC v2 18/76] target/riscv: introduce more imm value modes in translator functions,
Richard Henderson <=
- [RFC v2 19/76] target/riscv: rvv-0.9: add narrower_nanbox_fpr helper, frank . chang, 2020/07/22
- [RFC v2 20/76] target/riscv: rvv-0.9: apply narrower nanbox helper in opfvf_trans, frank . chang, 2020/07/22
- [RFC v2 21/76] target/riscv: rvv-0.9: configure instructions, frank . chang, 2020/07/22
- [RFC v2 22/76] target/riscv: rvv-0.9: stride load and store instructions, frank . chang, 2020/07/22
- [RFC v2 23/76] target/riscv: rvv-0.9: index load and store instructions, frank . chang, 2020/07/22
- [RFC v2 24/76] target/riscv: rvv-0.9: fix address index overflow bug of indexed load/store insns, frank . chang, 2020/07/22