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[PULL 32/44] hw/mips/malta: Move gt64120 related code together
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 32/44] hw/mips/malta: Move gt64120 related code together |
Date: |
Sat, 17 Oct 2020 16:02:31 +0200 |
The 'empty_slot' region created is related to the gt64120.
Move its creation close to the gt64120 instance creation.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201012160503.3472140-2-f4bug@amsat.org>
---
hw/mips/malta.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index a4a4c386268..944045d7701 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1239,13 +1239,6 @@ void mips_malta_init(MachineState *machine)
DeviceState *dev = qdev_new(TYPE_MIPS_MALTA);
MaltaState *s = MIPS_MALTA(dev);
- /*
- * The whole address space decoded by the GT-64120A doesn't generate
- * exception when accessing invalid memory. Create an empty slot to
- * emulate this feature.
- */
- empty_slot_init("GT64120", 0, 0x20000000);
-
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* create CPU */
@@ -1399,6 +1392,12 @@ void mips_malta_init(MachineState *machine)
/* Northbridge */
pci_bus = gt64120_register(s->i8259);
+ /*
+ * The whole address space decoded by the GT-64120A doesn't generate
+ * exception when accessing invalid memory. Create an empty slot to
+ * emulate this feature.
+ */
+ empty_slot_init("GT64120", 0, 0x20000000);
/* Southbridge */
dev = piix4_create(pci_bus, &isa_bus, &smbus);
--
2.26.2
- [PULL 22/44] hw/mips/r4k: Explicit CPU frequency is 200 MHz, (continued)
- [PULL 22/44] hw/mips/r4k: Explicit CPU frequency is 200 MHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 23/44] hw/mips/fuloong2e: Set CPU frequency to 533 MHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 24/44] hw/mips/mipssim: Correct CPU frequency, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 25/44] hw/mips/jazz: Correct CPU frequencies, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 26/44] hw/mips/cps: Expose input clock and connect it to CPU cores, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 27/44] hw/mips/boston: Set CPU frequency to 1 GHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 28/44] hw/mips/malta: Set CPU frequency to 320 MHz, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 29/44] hw/mips/cps: Do not allow use without input clock, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 30/44] target/mips/cpu: Display warning when CPU is used without input clock, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 31/44] hw/mips/malta: Fix FPGA I/O region size, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 32/44] hw/mips/malta: Move gt64120 related code together,
Philippe Mathieu-Daudé <=
- [PULL 33/44] hw/mips/malta: Use clearer qdev style, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 34/44] hw/mips: Simplify loading 64-bit ELF kernels, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 35/44] hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE), Philippe Mathieu-Daudé, 2020/10/17
- [PULL 36/44] hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTON, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 37/44] hw/mips: Remove exit(1) in case of missing ROM, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 38/44] tests/acceptance: Add MIPS record/replay tests, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 39/44] docs/system: Update MIPS CPU documentation, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 40/44] MAINTAINERS: Remove myself, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 41/44] MAINTAINERS: Put myself forward for MIPS target, Philippe Mathieu-Daudé, 2020/10/17
- [PULL 42/44] MAINTAINERS: Downgrade MIPS Boston to 'Odd Fixes', fix Paul Burton mail, Philippe Mathieu-Daudé, 2020/10/17