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[RFC PATCH v5 23/33] Hexagon (target/hexagon) opcode data structures
From: |
Taylor Simpson |
Subject: |
[RFC PATCH v5 23/33] Hexagon (target/hexagon) opcode data structures |
Date: |
Thu, 29 Oct 2020 19:08:29 -0500 |
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/opcodes.h | 63 +++++++++++++++++++++
target/hexagon/opcodes.c | 142 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 205 insertions(+)
create mode 100644 target/hexagon/opcodes.h
create mode 100644 target/hexagon/opcodes.c
diff --git a/target/hexagon/opcodes.h b/target/hexagon/opcodes.h
new file mode 100644
index 0000000..1aa2074
--- /dev/null
+++ b/target/hexagon/opcodes.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_OPCODES_H
+#define HEXAGON_OPCODES_H
+
+#include "qemu/bitmap.h"
+#include "attribs.h"
+
+typedef enum {
+#define OPCODE(IID) IID
+#include "opcodes_def_generated.h"
+ XX_LAST_OPCODE
+#undef OPCODE
+} Opcode;
+
+typedef enum {
+ NORMAL,
+ HALF,
+ SUBINSN_A,
+ SUBINSN_L1,
+ SUBINSN_L2,
+ SUBINSN_S1,
+ SUBINSN_S2,
+ EXT_noext,
+ EXT_mmvec,
+ XX_LAST_ENC_CLASS
+} EncClass;
+
+extern const char * const opcode_names[];
+
+extern const char * const opcode_reginfo[];
+extern const char * const opcode_rregs[];
+extern const char * const opcode_wregs[];
+
+typedef struct {
+ const char * const encoding;
+ const EncClass enc_class;
+} OpcodeEncoding;
+
+extern const OpcodeEncoding opcode_encodings[XX_LAST_OPCODE];
+
+extern DECLARE_BITMAP(opcode_attribs[XX_LAST_OPCODE], A_ZZ_LASTATTRIB);
+
+extern void opcode_init(void);
+
+extern int opcode_which_immediate_is_extended(Opcode opcode);
+
+#endif
diff --git a/target/hexagon/opcodes.c b/target/hexagon/opcodes.c
new file mode 100644
index 0000000..20400f5
--- /dev/null
+++ b/target/hexagon/opcodes.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/*
+ * opcodes.c
+ *
+ * data tables generated automatically
+ * Maybe some functions too
+ */
+
+#include "qemu/osdep.h"
+#include "opcodes.h"
+#include "decode.h"
+
+#define VEC_DESCR(A, B, C) DESCR(A, B, C)
+#define DONAME(X) #X
+
+const char * const opcode_names[] = {
+#define OPCODE(IID) DONAME(IID)
+#include "opcodes_def_generated.h"
+ NULL
+#undef OPCODE
+};
+
+const char * const opcode_reginfo[] = {
+#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
+#define REGINFO(TAG, REGINFO, RREGS, WREGS) REGINFO,
+#include "op_regs_generated.h"
+ NULL
+#undef REGINFO
+#undef IMMINFO
+};
+
+
+const char * const opcode_rregs[] = {
+#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
+#define REGINFO(TAG, REGINFO, RREGS, WREGS) RREGS,
+#include "op_regs_generated.h"
+ NULL
+#undef REGINFO
+#undef IMMINFO
+};
+
+
+const char * const opcode_wregs[] = {
+#define IMMINFO(TAG, SIGN, SIZE, SHAMT, SIGN2, SIZE2, SHAMT2) /* nothing */
+#define REGINFO(TAG, REGINFO, RREGS, WREGS) WREGS,
+#include "op_regs_generated.h"
+ NULL
+#undef REGINFO
+#undef IMMINFO
+};
+
+const char * const opcode_short_semantics[] = {
+#define DEF_SHORTCODE(TAG, SHORTCODE) [TAG] = #SHORTCODE,
+#include "shortcode_generated.h"
+#undef DEF_SHORTCODE
+ NULL
+};
+
+DECLARE_BITMAP(opcode_attribs[XX_LAST_OPCODE], A_ZZ_LASTATTRIB);
+
+static void init_attribs(int tag, ...)
+{
+ va_list ap;
+ int attr;
+ va_start(ap, tag);
+ while ((attr = va_arg(ap, int)) != 0) {
+ set_bit(attr, opcode_attribs[tag]);
+ }
+}
+
+const OpcodeEncoding opcode_encodings[] = {
+#define DEF_ENC32(OPCODE, ENCSTR) \
+ [OPCODE] = { .encoding = ENCSTR },
+
+#define DEF_ENC_SUBINSN(OPCODE, CLASS, ENCSTR) \
+ [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
+
+#define DEF_EXT_ENC(OPCODE, CLASS, ENCSTR) \
+ [OPCODE] = { .encoding = ENCSTR, .enc_class = CLASS },
+
+#include "imported/encode.def"
+
+#undef DEF_ENC32
+#undef DEF_ENC_SUBINSN
+#undef DEF_EXT_ENC
+};
+
+void opcode_init(void)
+{
+ init_attribs(0, 0);
+
+#define ATTRIBS(...) , ## __VA_ARGS__, 0
+#define OP_ATTRIB(TAG, ARGS) init_attribs(TAG ARGS);
+#include "op_attribs_generated.h"
+#undef OP_ATTRIB
+#undef ATTRIBS
+
+ decode_init();
+}
+
+
+#define NEEDLE "IMMEXT("
+
+int opcode_which_immediate_is_extended(Opcode opcode)
+{
+ const char *p;
+
+ g_assert(opcode < XX_LAST_OPCODE);
+ g_assert(GET_ATTRIB(opcode, A_EXTENDABLE));
+
+ p = opcode_short_semantics[opcode];
+ p = strstr(p, NEEDLE);
+ g_assert(p);
+ p += strlen(NEEDLE);
+ while (isspace(*p)) {
+ p++;
+ }
+ /* lower is always imm 0, upper always imm 1. */
+ if (islower(*p)) {
+ return 0;
+ } else if (isupper(*p)) {
+ return 1;
+ } else {
+ g_assert_not_reached();
+ }
+}
--
2.7.4
- [RFC PATCH v5 17/33] Hexagon (target/hexagon/fma_emu.[ch]) utility functions, (continued)
- [RFC PATCH v5 17/33] Hexagon (target/hexagon/fma_emu.[ch]) utility functions, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 20/33] Hexagon (target/hexagon) generator phase 2 - generate header files, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 08/33] Hexagon (target/hexagon) GDB Stub, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 16/33] Hexagon (target/hexagon/conv_emu.[ch]) utility functions, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 21/33] Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 07/33] Hexagon (target/hexagon) scalar core helpers, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 25/33] Hexagon (target/hexagon) instruction classes, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 31/33] Hexagon (tests/tcg/hexagon) TCG tests, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 18/33] Hexagon (target/hexagon/imported) arch import, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 19/33] Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 23/33] Hexagon (target/hexagon) opcode data structures,
Taylor Simpson <=
- [RFC PATCH v5 22/33] Hexagon (target/hexagon) generater phase 4 - decode tree, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 24/33] Hexagon (target/hexagon) macros, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 26/33] Hexagon (target/hexagon) TCG generation, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 28/33] Hexagon (target/hexagon) TCG for floating point instructions, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 27/33] Hexagon (target/hexagon) TCG for instructions with multiple definitions, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 29/33] Hexagon (target/hexagon) translation, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 30/33] Hexagon (linux-user/hexagon) Linux user emulation, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 32/33] Hexagon build infrastructure, Taylor Simpson, 2020/10/29
- [RFC PATCH v5 33/33] Add Dockerfile for hexagon, Taylor Simpson, 2020/10/29
- Re: [RFC PATCH v5 00/33] Hexagon patch series, no-reply, 2020/10/29