Re: [RFC v1 09/10] i386: split cpu.c and defer x86 models registration

[Claudio Fontana]

On 11/10/20 4:23 PM, Eduardo Habkost wrote:
> On Tue, Nov 10, 2020 at 11:41:46AM +0100, Paolo Bonzini wrote:
>> On 10/11/20 11:04, Daniel P. Berrangé wrote:
>>>
>>> ie, we should have one class hierarchy for CPU model definitions, and
>>> one class hierarchy  for accelerator CPU implementations.
>>>
>>> So at runtime we then get two object instances - a CPU implementation
>>> and a CPU definition. The CPU implementation object should have a
>>> property which is a link to the desired CPU definition.
>>
>> It doesn't even have to be two object instances.  The implementation can be
>> nothing more than a set of function pointers.
> 
> A set of function pointers is exactly what a QOM interface is.
> Could the methods be provided by a TYPE_X86_ACCEL interface type,
> implemented by the accel object?
> 

Hi Eduardo, Paolo,

conceptually this is also an attractive option, but there are a few issues I 
can see with this approach,

the first and most evident of which is that accel classes are used only for 
softmmu,
while we need the tcg cpu (or TYPE_X86_ACCEL interface to be used by the cpu) 
for user mode too.

I'll start working on some new prototype, trying to incorporate some ideas 
exchanged here, see what comes out.

Thanks,

Ciao,

CLaudio