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[RFC 06/15] target/riscv: rvb: min/max instructions
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From: |
frank . chang |
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Subject: |
[RFC 06/15] target/riscv: rvb: min/max instructions |
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Date: |
Wed, 18 Nov 2020 16:29:44 +0800 |
From: Kito Cheng <kito.cheng@sifive.com>
Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
---
target/riscv/insn32.decode | 4 ++++
target/riscv/insn_trans/trans_rvb.c.inc | 24 ++++++++++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index 79aa40f03dd..372476f1d2c 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -605,3 +605,7 @@ xnor 0100000 .......... 100 ..... 0110011 @r
pack 0000100 .......... 100 ..... 0110011 @r
packu 0100100 .......... 100 ..... 0110011 @r
packh 0000100 .......... 111 ..... 0110011 @r
+min 0000101 .......... 100 ..... 0110011 @r
+minu 0000101 .......... 101 ..... 0110011 @r
+max 0000101 .......... 110 ..... 0110011 @r
+maxu 0000101 .......... 111 ..... 0110011 @r
diff --git a/target/riscv/insn_trans/trans_rvb.c.inc
b/target/riscv/insn_trans/trans_rvb.c.inc
index 9257373ae0b..b9a0e39a3e5 100644
--- a/target/riscv/insn_trans/trans_rvb.c.inc
+++ b/target/riscv/insn_trans/trans_rvb.c.inc
@@ -71,6 +71,30 @@ static bool trans_packh(DisasContext *ctx, arg_packh *a)
return gen_arith(ctx, a, &gen_packh);
}
+static bool trans_min(DisasContext *ctx, arg_min *a)
+{
+ REQUIRE_EXT(ctx, RVB);
+ return gen_arith(ctx, a, &tcg_gen_smin_tl);
+}
+
+static bool trans_max(DisasContext *ctx, arg_max *a)
+{
+ REQUIRE_EXT(ctx, RVB);
+ return gen_arith(ctx, a, &tcg_gen_smax_tl);
+}
+
+static bool trans_minu(DisasContext *ctx, arg_minu *a)
+{
+ REQUIRE_EXT(ctx, RVB);
+ return gen_arith(ctx, a, &tcg_gen_umin_tl);
+}
+
+static bool trans_maxu(DisasContext *ctx, arg_maxu *a)
+{
+ REQUIRE_EXT(ctx, RVB);
+ return gen_arith(ctx, a, &tcg_gen_umax_tl);
+}
+
/* RV64-only instructions */
#ifdef TARGET_RISCV64
--
2.17.1
- Re: [RFC 01/15] target/riscv: reformat @sh format encoding for B-extension, (continued)
- [RFC 02/15] target/riscv: rvb: count leading/trailing zeros, frank . chang, 2020/11/18
- [RFC 03/15] target/riscv: rvb: count bits set, frank . chang, 2020/11/18
- [RFC 04/15] target/riscv: rvb: logic-with-negate, frank . chang, 2020/11/18
- [RFC 05/15] target/riscv: rvb: pack two words into one register, frank . chang, 2020/11/18
- [RFC 06/15] target/riscv: rvb: min/max instructions,
frank . chang <=
- [RFC 07/15] target/riscv: rvb: sign-extend instructions, frank . chang, 2020/11/18
- [RFC 08/15] target/riscv: rvb: single-bit instructions, frank . chang, 2020/11/18
- [RFC 09/15] target/riscv: rvb: shift ones, frank . chang, 2020/11/18
- [RFC 10/15] target/riscv: rvb: rotate (left/right), frank . chang, 2020/11/18