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Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writ
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From: |
Keith Busch |
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Subject: |
Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes |
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Date: |
Wed, 20 Jan 2021 03:58:02 +0900 |
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User-agent: |
Mutt/1.12.1 (2019-06-15) |
On Mon, Jan 18, 2021 at 08:53:24PM +0100, Klaus Jensen wrote:
> On Jan 18 21:59, Minwoo Im wrote:
> > > The spec requires aligned 32 bit accesses (or the size of the register),
> > > so maybe it's about time we actually ignore instead of falling through.
> >
> > Agreed.
> >
>
> On the other hand.
>
> The spec just allows undefined behavior if the alignment or size
> requirement is violated. So falling through is not wrong.
>
> Keith, any thoughts on this?
If the host's access is unaligned and breaks something, the host gets
to keep both pieces.
[PATCH v2 03/12] hw/block/nvme: indicate CMB support through controller capabilities register, Klaus Jensen, 2021/01/18
[PATCH v2 04/12] hw/block/nvme: move msix table and pba to BAR 0, Klaus Jensen, 2021/01/18
[PATCH v2 05/12] hw/block/nvme: allow cmb and pmr to coexist, Klaus Jensen, 2021/01/18
[PATCH v2 06/12] hw/block/nvme: rename PMR/CMB shift/mask fields, Klaus Jensen, 2021/01/18
[PATCH v2 07/12] hw/block/nvme: remove redundant zeroing of PMR registers, Klaus Jensen, 2021/01/18