[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[RFC PATCH 27/42] target/mips/translate: Make gen_rdhwr() public
From: |
Philippe Mathieu-Daudé |
Subject: |
[RFC PATCH 27/42] target/mips/translate: Make gen_rdhwr() public |
Date: |
Sun, 14 Feb 2021 18:58:57 +0100 |
We will use gen_rdhwr() outside of translate.c, make it public.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/translate.h | 2 ++
target/mips/translate.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/mips/translate.h b/target/mips/translate.h
index bc91ac4f53f..d2ba3524b51 100644
--- a/target/mips/translate.h
+++ b/target/mips/translate.h
@@ -148,6 +148,8 @@ void gen_op_addr_add(DisasContext *ctx, TCGv ret, TCGv
arg0, TCGv arg1);
bool gen_lsa(DisasContext *ctx, int rd, int rt, int rs, int sa);
bool gen_dlsa(DisasContext *ctx, int rd, int rt, int rs, int sa);
+void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel);
+
extern TCGv cpu_gpr[32], cpu_PC;
#if defined(TARGET_MIPS64)
extern TCGv_i64 cpu_gpr_hi[32];
diff --git a/target/mips/translate.c b/target/mips/translate.c
index bed0489997a..c1d07a4591d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -12655,7 +12655,7 @@ static void gen_flt3_arith(DisasContext *ctx, uint32_t
opc,
}
}
-static void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel)
+void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel)
{
TCGv t0;
--
2.26.2
- [RFC PATCH 22/42] target/mips/tx79: Introduce PINTEH (Parallel Interleave Even Halfword), (continued)
- [RFC PATCH 22/42] target/mips/tx79: Introduce PINTEH (Parallel Interleave Even Halfword), Philippe Mathieu-Daudé, 2021/02/14
- [RFC PATCH 23/42] target/mips/tx79: Introduce PEXE[HW] opcodes (Parallel Exchange Even), Philippe Mathieu-Daudé, 2021/02/14
- [RFC PATCH 24/42] target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words), Philippe Mathieu-Daudé, 2021/02/14
- [RFC PATCH 25/42] target/mips/tx79: Introduce LQ opcode (Load Quadword), Philippe Mathieu-Daudé, 2021/02/14
- [RFC PATCH 26/42] target/mips/tx79: Introduce SQ opcode (Store Quadword), Philippe Mathieu-Daudé, 2021/02/14
- [RFC PATCH 27/42] target/mips/translate: Make gen_rdhwr() public,
Philippe Mathieu-Daudé <=
- [RFC PATCH 28/42] target/mips/tx79: Move RDHWR usermode kludge to trans_SQ(), Philippe Mathieu-Daudé, 2021/02/14
[RFC PATCH 29/42] linux-user/mips64: Support the n32 ABI for the R5900, Philippe Mathieu-Daudé, 2021/02/14
[RFC PATCH 30/42] target/mips: Reintroduce the R5900 CPU, Philippe Mathieu-Daudé, 2021/02/14