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[PATCH 36/44] hw/arm/mps2-tz: Make UART overflow IRQ board-specific
From: |
Peter Maydell |
Subject: |
[PATCH 36/44] hw/arm/mps2-tz: Make UART overflow IRQ board-specific |
Date: |
Fri, 19 Feb 2021 14:46:09 +0000 |
The AN547 puts the combined UART overflow IRQ at 48, not 47 like the
other images. Make this setting board-specific.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/mps2-tz.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index aca8efba6cf..779fdb9a544 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -111,6 +111,7 @@ struct MPS2TZMachineClass {
uint32_t fpgaio_num_leds; /* Number of LEDs in FPGAIO LED0 register */
bool fpgaio_has_switches; /* Does FPGAIO have SWITCH register? */
int numirq; /* Number of external interrupts */
+ int uart_overflow_irq; /* number of the combined UART overflow IRQ */
const RAMInfo *raminfo;
const char *armsse_type;
};
@@ -760,7 +761,7 @@ static void mps2tz_common_init(MachineState *machine)
&error_fatal);
qdev_realize(DEVICE(&mms->uart_irq_orgate), NULL, &error_fatal);
qdev_connect_gpio_out(DEVICE(&mms->uart_irq_orgate), 0,
- get_sse_irq_in(mms, 47));
+ get_sse_irq_in(mms, mmc->uart_overflow_irq));
/* Most of the devices in the FPGA are behind Peripheral Protection
* Controllers. The required order for initializing things is:
@@ -1036,6 +1037,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void
*data)
mmc->fpgaio_num_leds = 2;
mmc->fpgaio_has_switches = false;
mmc->numirq = 92;
+ mmc->uart_overflow_irq = 47;
mmc->raminfo = an505_raminfo;
mmc->armsse_type = TYPE_IOTKIT;
mps2tz_set_default_ram_info(mmc);
@@ -1059,6 +1061,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void
*data)
mmc->fpgaio_num_leds = 2;
mmc->fpgaio_has_switches = false;
mmc->numirq = 92;
+ mmc->uart_overflow_irq = 47;
mmc->raminfo = an505_raminfo; /* AN521 is the same as AN505 here */
mmc->armsse_type = TYPE_SSE200;
mps2tz_set_default_ram_info(mmc);
@@ -1082,6 +1085,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void
*data)
mmc->fpgaio_num_leds = 10;
mmc->fpgaio_has_switches = true;
mmc->numirq = 95;
+ mmc->uart_overflow_irq = 47;
mmc->raminfo = an524_raminfo;
mmc->armsse_type = TYPE_SSE200;
mps2tz_set_default_ram_info(mmc);
--
2.20.1
- [PATCH 37/44] hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate, (continued)
- [PATCH 37/44] hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate, Peter Maydell, 2021/02/19
- [PATCH 38/44] hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register, Peter Maydell, 2021/02/19
- [PATCH 41/44] hw/arm/mps2-tz: Make initsvtor0 setting board-specific, Peter Maydell, 2021/02/19
- [PATCH 40/44] hw/arm/mps2-tz: Support running APB peripherals on different clock, Peter Maydell, 2021/02/19
- [PATCH 35/44] hw/arm/armsse: Add SSE-300 support, Peter Maydell, 2021/02/19
- [PATCH 28/44] hw/arm/armsse: Move sysctl register block into data-driven framework, Peter Maydell, 2021/02/19
- [PATCH 27/44] hw/arm/armsse: Move sysinfo register block into data-driven framework, Peter Maydell, 2021/02/19
- [PATCH 30/44] hw/arm/armsse: Add missing SSE-200 SYS_PPU, Peter Maydell, 2021/02/19
- [PATCH 29/44] hw/arm/armsse: Move PPUs into data-driven framework, Peter Maydell, 2021/02/19
- [PATCH 32/44] hw/arm/armsse: Add support for SSE variants with a system counter, Peter Maydell, 2021/02/19
- [PATCH 36/44] hw/arm/mps2-tz: Make UART overflow IRQ board-specific,
Peter Maydell <=
- [PATCH 39/44] hw/misc/mps2-scc: Implement changes for AN547, Peter Maydell, 2021/02/19
- [PATCH 42/44] hw/arm/mps2-tz: Add new mps3-an547 board, Peter Maydell, 2021/02/19
- [PATCH 44/44] tests/qtest/sse-timer-test: Add simple tests of the SSE timer and counter, Peter Maydell, 2021/02/19
- [PATCH 43/44] docs/system/arm/mps2.rst: Document the new mps3-an547 board, Peter Maydell, 2021/02/19
- Re: [PATCH 00/44] hw/arm: New board model mps3-an547, no-reply, 2021/02/19