Re: [PATCH v4 00/26] Hexagon (target/hexagon) update

[Richard Henderson]

On 4/8/21 6:07 PM, Taylor Simpson wrote:
> Taylor Simpson (26):
>    Hexagon (target/hexagon) TCG generation cleanup
>    Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair
>    Hexagon (target/hexagon) remove unnecessary inline directives
>    Hexagon (target/hexagon) use env_archcpu and env_cpu
>    Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN
>    Hexagon (target/hexagon) decide if pred has been written at TCG gen
>      time
>    Hexagon (target/hexagon) change variables from int to bool when
>      appropriate
>    Hexagon (target/hexagon) remove unused carry_from_add64 function
>    Hexagon (target/hexagon) change type of softfloat_roundingmodes
>    Hexagon (target/hexagon) use softfloat default NaN and tininess
>    Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn
>    Hexagon (target/hexagon) use softfloat for float-to-int conversions
>    Hexagon (target/hexagon) cleanup ternary operators in semantics
>    Hexagon (target/hexagon) cleanup reg_field_info definition
>    Hexagon (target/hexagon) move QEMU_GENERATE to only be on during
>      macros.h
>    Hexagon (target/hexagon) compile all debug code
>    Hexagon (target/hexagon) add F2_sfrecipa instruction
>    Hexagon (target/hexagon) add F2_sfinvsqrta
>    Hexagon (target/hexagon) add A5_ACS (vacsh)
>    Hexagon (target/hexagon) add A6_vminub_RdP
>    Hexagon (target/hexagon) add A4_addp_c/A4_subp_c
>    Hexagon (target/hexagon) circular addressing
>    Hexagon (target/hexagon) bit reverse (brev) addressing
>    Hexagon (target/hexagon) load and unpack bytes instructions
>    Hexagon (target/hexagon) load into shifted register instructions
>    Hexagon (target/hexagon) CABAC decode bin

Queued, thanks.


r~