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[PULL 10/31] tcg/aarch64: Fix tcg_out_rotl
From: |
Richard Henderson |
Subject: |
[PULL 10/31] tcg/aarch64: Fix tcg_out_rotl |
Date: |
Wed, 26 May 2021 16:46:49 -0700 |
From: Yasuo Kuwahara <kwhr00@gmail.com>
The last argument of tcg_out_extr() must be in the range 0-31 if ext==0.
Before the fix, when m==0 it becomes 32 and it crashes with an Illegal
instruction on Apple Silicon. After the fix, it will be 0. If m is in
the range 1-31, it is the same as before.
Signed-off-by: Yasuo Kuwahara <kwhr00@gmail.com>
Message-Id: <CAHfJ0vSXnmnTLmT0kR=a8ACRdw_UsLYOhStzUzgVEHoH8U-7sA@mail.gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.c.inc | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index f07ba98aa4..5bd366f2d4 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1291,9 +1291,8 @@ static inline void tcg_out_rotr(TCGContext *s, TCGType
ext,
static inline void tcg_out_rotl(TCGContext *s, TCGType ext,
TCGReg rd, TCGReg rn, unsigned int m)
{
- int bits = ext ? 64 : 32;
- int max = bits - 1;
- tcg_out_extr(s, ext, rd, rn, rn, bits - (m & max));
+ int max = ext ? 63 : 31;
+ tcg_out_extr(s, ext, rd, rn, rn, -m & max);
}
static inline void tcg_out_dep(TCGContext *s, TCGType ext, TCGReg rd,
--
2.25.1
- [PULL 03/31] exec/memory_ldst: Use correct type sizes, (continued)
- [PULL 03/31] exec/memory_ldst: Use correct type sizes, Richard Henderson, 2021/05/26
- [PULL 01/31] exec/memory_ldst_cached: Sort declarations, Richard Henderson, 2021/05/26
- [PULL 14/31] cpu: Introduce cpu_virtio_is_big_endian(), Richard Henderson, 2021/05/26
- [PULL 11/31] cpu: Remove duplicated 'sysemu/hw_accel.h' header, Richard Henderson, 2021/05/26
- [PULL 16/31] cpu: Directly use get_paging_enabled() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 07/31] accel/tcg: Reduce 'exec/tb-context.h' inclusion, Richard Henderson, 2021/05/26
- [PULL 02/31] exec/memory_ldst_phys: Sort declarations, Richard Henderson, 2021/05/26
- [PULL 06/31] exec/memory: Use correct type size, Richard Henderson, 2021/05/26
- [PULL 05/31] exec/memory_ldst_cached: Use correct type size, Richard Henderson, 2021/05/26
- [PULL 09/31] replay: fix watchpoint processing for reverse debugging, Richard Henderson, 2021/05/26
- [PULL 10/31] tcg/aarch64: Fix tcg_out_rotl,
Richard Henderson <=
- [PULL 08/31] accel/tcg: Keep TranslationBlock headers local to TCG, Richard Henderson, 2021/05/26
- [PULL 13/31] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs, Richard Henderson, 2021/05/26
- [PULL 12/31] cpu: Split as cpu-common / cpu-sysemu, Richard Henderson, 2021/05/26
- [PULL 04/31] exec/memory_ldst_phys: Use correct type sizes, Richard Henderson, 2021/05/26
- [PULL 15/31] cpu: Directly use cpu_write_elf*() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 20/31] cpu: Move AVR target vmsd field from CPUClass to DeviceClass, Richard Henderson, 2021/05/26
- [PULL 26/31] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps, Richard Henderson, 2021/05/26
- [PULL 17/31] cpu: Directly use get_memory_mapping() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 18/31] cpu: Assert DeviceClass::vmsd is NULL on user emulation, Richard Henderson, 2021/05/26
- [PULL 19/31] cpu: Rename CPUClass vmsd -> legacy_vmsd, Richard Henderson, 2021/05/26