Re: [PATCH v7 22/27] tcg/tci: Implement add2, sub2

[Philippe Mathieu-Daudé]

On 6/1/21 5:01 PM, Richard Henderson wrote:
> We already had the 32-bit versions for a 32-bit host; expand this
> to 64-bit hosts as well.  The 64-bit opcodes are new.
> 
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  tcg/tci/tcg-target.h     |  8 ++++----
>  tcg/tci.c                | 40 ++++++++++++++++++++++++++--------------
>  tcg/tci/tcg-target.c.inc | 15 ++++++++-------
>  3 files changed, 38 insertions(+), 25 deletions(-)

> +#if TCG_TARGET_HAS_add2_i64
> +        case INDEX_op_add2_i64:
> +            tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5);
> +            T1 = regs[r2] + regs[r4];

// lo

> +            T2 = regs[r3] + regs[r5] + (T1 < regs[r2]);

// hi + lo ovf

> +            regs[r0] = T1;

// lo

> +            regs[r1] = T2;

// hi

OK.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> +            break;
> +#endif
> +#if TCG_TARGET_HAS_add2_i64
> +        case INDEX_op_sub2_i64:
> +            tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5);
> +            T1 = regs[r2] - regs[r4];
> +            T2 = regs[r3] - regs[r5] - (regs[r2] < regs[r4]);
> +            regs[r0] = T1;
> +            regs[r1] = T2;
> +            break;
> +#endif