Re: [PATCH v4 00/16] tcg/s390x: host vector support

[no-reply]

Patchew URL: 
20210626050307.2408505-1-richard.henderson@linaro.org/">https://patchew.org/QEMU/20210626050307.2408505-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20210626050307.2408505-1-richard.henderson@linaro.org
Subject: [PATCH v4 00/16] tcg/s390x: host vector support

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      
patchew/1624662174-175828-1-git-send-email-joe.komlodi@xilinx.com -> 
patchew/1624662174-175828-1-git-send-email-joe.komlodi@xilinx.com
 * [new tag]         
patchew/20210626050307.2408505-1-richard.henderson@linaro.org -> 
patchew/20210626050307.2408505-1-richard.henderson@linaro.org
Switched to a new branch 'test'
450f369 tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec
8e21c6d tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec
08ee9ea tcg/s390x: Implement TCG_TARGET_HAS_sat_vec
d8965f5 tcg: Expand usadd/ussub with umin/umax
c0e682e tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec
0da72da tcg/s390x: Implement vector shift operations
74cabba tcg/s390x: Implement TCG_TARGET_HAS_mul_vec
6802563 tcg/s390x: Implement andc, orc, abs, neg, not vector operations
2e6a1d1 tcg/s390x: Implement minimal vector operations
79d9159 tcg/s390x: Implement tcg_out_dup*_vec
bea702b tcg/s390x: Implement tcg_out_mov for vector types
0f3391a tcg/s390x: Implement tcg_out_ld/st for vector types
f42d835 tcg/s390x: Add host vector framework
9177ed4 tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg
2a4f62a tcg/s390x: Change FACILITY representation
a658bf1 tcg/s390x: Rename from tcg/s390

=== OUTPUT BEGIN ===
1/16 Checking commit a658bf1e830e (tcg/s390x: Rename from tcg/s390)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#14: 
 tcg/{s390 => s390x}/tcg-target-con-set.h | 0

total: 0 errors, 1 warnings, 8 lines checked

Patch 1/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
2/16 Checking commit 2a4f62a50f8b (tcg/s390x: Change FACILITY representation)
3/16 Checking commit 9177ed47e299 (tcg/s390x: Merge TCG_AREG0 and 
TCG_REG_CALL_STACK into TCGReg)
4/16 Checking commit f42d8359719e (tcg/s390x: Add host vector framework)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#332: 
new file mode 100644

total: 0 errors, 1 warnings, 290 lines checked

Patch 4/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/16 Checking commit 0f3391aaa2cd (tcg/s390x: Implement tcg_out_ld/st for 
vector types)
6/16 Checking commit bea702b5073d (tcg/s390x: Implement tcg_out_mov for vector 
types)
7/16 Checking commit 79d91599ec9d (tcg/s390x: Implement tcg_out_dup*_vec)
8/16 Checking commit 2e6a1d1cabb0 (tcg/s390x: Implement minimal vector 
operations)
9/16 Checking commit 6802563e3047 (tcg/s390x: Implement andc, orc, abs, neg, 
not vector operations)
10/16 Checking commit 74cabba13647 (tcg/s390x: Implement TCG_TARGET_HAS_mul_vec)
11/16 Checking commit 0da72da189bc (tcg/s390x: Implement vector shift 
operations)
12/16 Checking commit c0e682e2f209 (tcg/s390x: Implement 
TCG_TARGET_HAS_minmax_vec)
13/16 Checking commit d8965f562f5c (tcg: Expand usadd/ussub with umin/umax)
14/16 Checking commit 08ee9eacc1e8 (tcg/s390x: Implement TCG_TARGET_HAS_sat_vec)
ERROR: space prohibited between function name and open parenthesis '('
#75: FILE: tcg/s390x/tcg-target.c.inc:2892:
+    tcg_debug_assert (vece < MO_64);

total: 1 errors, 0 warnings, 112 lines checked

Patch 14/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/16 Checking commit 8e21c6dcca74 (tcg/s390x: Implement 
TCG_TARGET_HAS_bitsel_vec)
16/16 Checking commit 450f369a36f2 (tcg/s390x: Implement 
TCG_TARGET_HAS_cmpsel_vec)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
20210626050307.2408505-1-richard.henderson@linaro.org/testing.checkpatch/?type=message">http://patchew.org/logs/20210626050307.2408505-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
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