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Re: [PATCH v1 7/9] hw/arm/xlnx-versal: Connect the OSPI flash memory con
From: |
Edgar E. Iglesias |
Subject: |
Re: [PATCH v1 7/9] hw/arm/xlnx-versal: Connect the OSPI flash memory controller model |
Date: |
Fri, 19 Nov 2021 18:14:44 +0100 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Wed, Nov 17, 2021 at 02:18:39PM +0000, Francisco Iglesias wrote:
> Connect the OSPI flash memory controller model (including the source and
> destination DMA).
>
> Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
> ---
> hw/arm/xlnx-versal.c | 89
> ++++++++++++++++++++++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 18 +++++++++
> 2 files changed, 107 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 08e250945f..f8e94a50fd 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -24,6 +24,7 @@
>
> #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
> #define GEM_REVISION 0x40070106
> +#define NUM_OSPI_IRQ_LINES 3
>
> static void versal_create_apu_cpus(Versal *s)
> {
> @@ -385,6 +386,93 @@ static void versal_create_pmc_iou_slcr(Versal *s,
> qemu_irq *pic)
> sysbus_connect_irq(sbd, 0, pic[VERSAL_PMC_IOU_SLCR_IRQ]);
> }
>
> +static void versal_create_ospi(Versal *s, qemu_irq *pic)
> +{
> + SysBusDevice *sbd;
> + MemoryRegion *mr_dac;
> +
> + memory_region_init(&s->pmc.iou.lospi_mr, OBJECT(s),
> + "versal-lospi_mr" , MM_PMC_OSPI_DAC_SIZE);
> +
> + object_initialize_child(OBJECT(s), "versal-ospi", &s->pmc.iou.ospi,
> + TYPE_XILINX_VERSAL_OSPI);
> +
> + mr_dac = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->pmc.iou.ospi), 1);
> + memory_region_add_subregion(&s->pmc.iou.lospi_mr, 0x0, mr_dac);
> +
> + /* Create the OSPI destination DMA */
> + object_initialize_child(OBJECT(s), "versal-ospi-dma-dst",
> + &s->pmc.iou.ospi_dma_dst,
> + TYPE_XLNX_CSU_DMA);
> +
> + object_property_set_link(OBJECT(&s->pmc.iou.ospi_dma_dst),
> + "dma", OBJECT(get_system_memory()),
> + &error_abort);
> +
> + sbd = SYS_BUS_DEVICE(&s->pmc.iou.ospi_dma_dst);
> + sysbus_realize(sbd, &error_fatal);
> +
> + memory_region_add_subregion(&s->mr_ps, MM_PMC_OSPI_DMA_DST,
> + sysbus_mmio_get_region(sbd, 0));
> +
> + sysbus_connect_irq(SYS_BUS_DEVICE(sbd), 0, pic[VERSAL_OSPI_IRQ]);
> +
> + /* Create the OSPI source DMA */
> + object_initialize_child(OBJECT(s), "versal-ospi-dma-src",
> + &s->pmc.iou.ospi_dma_src,
> + TYPE_XLNX_CSU_DMA);
> +
> + object_property_set_bool(OBJECT(&s->pmc.iou.ospi_dma_src), "is-dst",
> + false, &error_abort);
> +
> + object_property_set_link(OBJECT(&s->pmc.iou.ospi_dma_src),
> + "dma", OBJECT(mr_dac), &error_abort);
> +
> + object_property_set_link(OBJECT(&s->pmc.iou.ospi_dma_src),
> + "stream-connected-dma",
> + OBJECT(&s->pmc.iou.ospi_dma_dst),
> + &error_abort);
> +
> + sbd = SYS_BUS_DEVICE(&s->pmc.iou.ospi_dma_src);
> + sysbus_realize(sbd, &error_fatal);
> +
> + memory_region_add_subregion(&s->mr_ps, MM_PMC_OSPI_DMA_SRC,
> + sysbus_mmio_get_region(sbd, 0));
> +
> + /* Create the OSPI */
> + object_property_set_link(OBJECT(&s->pmc.iou.ospi), "dma-src",
> + OBJECT(&s->pmc.iou.ospi_dma_src), &error_abort);
> +
> + sbd = SYS_BUS_DEVICE(&s->pmc.iou.ospi);
> + sysbus_realize(sbd, &error_fatal);
> +
> + memory_region_add_subregion(&s->mr_ps, MM_PMC_OSPI,
> + sysbus_mmio_get_region(sbd, 0));
> +
> + memory_region_add_subregion(&s->mr_ps, MM_PMC_OSPI_DAC,
> + &s->pmc.iou.lospi_mr);
> +
> + /* ospi_mux_sel */
> + qdev_connect_gpio_out(DEVICE(&s->pmc.iou.slcr), 3,
> + qdev_get_gpio_in(DEVICE(&s->pmc.iou.ospi), 0));
> +
> + /* OSPI irq */
> + object_initialize_child(OBJECT(s), "ospi-irq",
> + &s->pmc.iou.ospi_irq, TYPE_OR_IRQ);
> + object_property_set_int(OBJECT(&s->pmc.iou.ospi_irq),
> + "num-lines", NUM_OSPI_IRQ_LINES, &error_fatal);
> + qdev_realize(DEVICE(&s->pmc.iou.ospi_irq), NULL, &error_fatal);
> +
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pmc.iou.ospi), 0,
> + qdev_get_gpio_in(DEVICE(&s->pmc.iou.ospi_irq), 0));
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pmc.iou.ospi_dma_src), 0,
> + qdev_get_gpio_in(DEVICE(&s->pmc.iou.ospi_irq), 1));
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pmc.iou.ospi_dma_dst), 0,
> + qdev_get_gpio_in(DEVICE(&s->pmc.iou.ospi_irq), 2));
> +
> + qdev_connect_gpio_out(DEVICE(&s->pmc.iou.ospi_irq), 0,
> + pic[VERSAL_OSPI_IRQ]);
> +}
>
> /* This takes the board allocated linear DDR memory and creates aliases
> * for each split DDR range/aperture on the Versal address map.
> @@ -477,6 +565,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
> versal_create_bbram(s, pic);
> versal_create_efuse(s, pic);
> versal_create_pmc_iou_slcr(s, pic);
> + versal_create_ospi(s, pic);
> versal_map_ddr(s);
> versal_unimp(s);
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index 729c093dfc..dae15db352 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -26,6 +26,8 @@
> #include "hw/misc/xlnx-versal-xramc.h"
> #include "hw/nvram/xlnx-bbram.h"
> #include "hw/nvram/xlnx-versal-efuse.h"
> +#include "hw/ssi/xlnx-versal-ospi.h"
> +#include "hw/dma/xlnx_csu_dma.h"
> #include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
>
> #define TYPE_XLNX_VERSAL "xlnx-versal"
> @@ -80,6 +82,12 @@ struct Versal {
> struct {
> SDHCIState sd[XLNX_VERSAL_NR_SDS];
> XlnxVersalPmcIouSlcr slcr;
> +
> + XlnxVersalOspi ospi;
> + XlnxCSUDMA ospi_dma_src;
> + XlnxCSUDMA ospi_dma_dst;
> + MemoryRegion lospi_mr;
> + qemu_or_irq ospi_irq;
I wonder if we should do something like?
struct {
XlnxVersalOspi ospi;
XlnxCSUDMA dma_src;
XlnxCSUDMA dma_dst;
MemoryRegion linear_mr;
qemu_or_irq irq;
} ospi;
But either way is OK with me:
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- [PATCH v1 1/9] hw/misc: Add a model of Versal's PMC SLCR, (continued)
- [PATCH v1 1/9] hw/misc: Add a model of Versal's PMC SLCR, Francisco Iglesias, 2021/11/17
- [PATCH v1 3/9] include/hw/dma/xlnx_csu_dma: Include ptimer.h and stream.h in the header, Francisco Iglesias, 2021/11/17
- [PATCH v1 4/9] hw/dma: Add the DMA control interface, Francisco Iglesias, 2021/11/17
- [PATCH v1 9/9] hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to the OSPI, Francisco Iglesias, 2021/11/17
- [PATCH v1 5/9] hw/dma/xlnx_csu_dma: Implement the DMA control interface, Francisco Iglesias, 2021/11/17
- [PATCH v1 7/9] hw/arm/xlnx-versal: Connect the OSPI flash memory controller model, Francisco Iglesias, 2021/11/17
- Re: [PATCH v1 7/9] hw/arm/xlnx-versal: Connect the OSPI flash memory controller model,
Edgar E. Iglesias <=
- [PATCH v1 8/9] hw/block/m25p80: Add support for Micron Xccela flash mt35xu01g, Francisco Iglesias, 2021/11/17
- [PATCH v1 6/9] hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controller, Francisco Iglesias, 2021/11/17