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[PULL 13/32] hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to the O
From: |
Peter Maydell |
Subject: |
[PULL 13/32] hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to the OSPI |
Date: |
Fri, 28 Jan 2022 15:29:50 +0000 |
From: Francisco Iglesias <francisco.iglesias@xilinx.com>
Connect Micron Xccela mt35xu01g flashes to the OSPI flash memory
controller.
Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220121161141.14389-10-francisco.iglesias@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/xlnx-versal-virt.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 8ea9979710f..3f56ae28eea 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -25,6 +25,8 @@
#define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
OBJECT_DECLARE_SIMPLE_TYPE(VersalVirt, XLNX_VERSAL_VIRT_MACHINE)
+#define XLNX_VERSAL_NUM_OSPI_FLASH 4
+
struct VersalVirt {
MachineState parent_obj;
@@ -691,6 +693,27 @@ static void versal_virt_init(MachineState *machine)
exit(EXIT_FAILURE);
}
}
+
+ for (i = 0; i < XLNX_VERSAL_NUM_OSPI_FLASH; i++) {
+ BusState *spi_bus;
+ DeviceState *flash_dev;
+ qemu_irq cs_line;
+ DriveInfo *dinfo = drive_get(IF_MTD, 0, i);
+
+ spi_bus = qdev_get_child_bus(DEVICE(&s->soc.pmc.iou.ospi), "spi0");
+
+ flash_dev = qdev_new("mt35xu01g");
+ if (dinfo) {
+ qdev_prop_set_drive_err(flash_dev, "drive",
+ blk_by_legacy_dinfo(dinfo), &error_fatal);
+ }
+ qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal);
+
+ cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.pmc.iou.ospi),
+ i + 1, cs_line);
+ }
}
static void versal_virt_machine_instance_init(Object *obj)
--
2.25.1
- [PULL 16/32] scripts: Explain the difference between linux-headers and standard-headers, (continued)
- [PULL 16/32] scripts: Explain the difference between linux-headers and standard-headers, Peter Maydell, 2022/01/28
- [PULL 06/32] hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models, Peter Maydell, 2022/01/28
- [PULL 01/32] Update copyright dates to 2022, Peter Maydell, 2022/01/28
- [PULL 17/32] target/arm: Log CPU index in 'Taking exception' log, Peter Maydell, 2022/01/28
- [PULL 04/32] rtc: Move RTC function prototypes to their own header, Peter Maydell, 2022/01/28
- [PULL 07/32] hw/arm/xlnx-versal: Connect Versal's PMC SLCR, Peter Maydell, 2022/01/28
- [PULL 23/32] hw/intc/arm_gicv3_its: Sort ITS command list into numeric order, Peter Maydell, 2022/01/28
- [PULL 25/32] hw/intc/arm_gicv3: Set GICR_CTLR.CES if LPIs are supported, Peter Maydell, 2022/01/28
- [PULL 14/32] MAINTAINERS: Add an entry for Xilinx Versal OSPI, Peter Maydell, 2022/01/28
- [PULL 10/32] hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controller, Peter Maydell, 2022/01/28
- [PULL 13/32] hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to the OSPI,
Peter Maydell <=
- [PULL 31/32] hw/arm: ast2600: Fix address mapping of second SPI controller, Peter Maydell, 2022/01/28
- [PULL 15/32] MAINTAINERS: Remove myself (for raspi)., Peter Maydell, 2022/01/28
- [PULL 11/32] hw/arm/xlnx-versal: Connect the OSPI flash memory controller model, Peter Maydell, 2022/01/28
- [PULL 20/32] hw/intc/arm_gicv3_its: Don't clear GITS_CREADR when GITS_CTLR.ENABLED is set, Peter Maydell, 2022/01/28
- [PULL 26/32] hw/intc/arm_gicv3_its: Provide read accessor for translation_ops, Peter Maydell, 2022/01/28
- [PULL 03/32] hw/char/exynos4210_uart: Fix crash on trying to load VM state, Peter Maydell, 2022/01/28
- [PULL 21/32] hw/intc/arm_gicv3_its: Don't clear GITS_CWRITER on writes to GITS_CBASER, Peter Maydell, 2022/01/28
- [PULL 08/32] include/hw/dma/xlnx_csu_dma: Add in missing includes in the header, Peter Maydell, 2022/01/28
- [PULL 18/32] hw/intc/arm_gicv3_its: Add tracepoints, Peter Maydell, 2022/01/28
- [PULL 22/32] hw/intc/arm_gicv3: Honour GICD_CTLR.EnableGrp1NS for LPIs, Peter Maydell, 2022/01/28