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[PULL 07/39] target/ppc: add vhyp addressing mode helper for radix MMU
From: |
Cédric Le Goater |
Subject: |
[PULL 07/39] target/ppc: add vhyp addressing mode helper for radix MMU |
Date: |
Fri, 18 Feb 2022 11:37:55 +0100 |
From: Nicholas Piggin <npiggin@gmail.com>
The radix on vhyp MMU uses a single-level radix table walk, with the
partition scope mapping provided by the flat QEMU machine memory.
A subsequent change will use the two-level radix walk on vhyp in some
situations, so provide a helper which can abstract that logic.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20220216102545.1808018-5-npiggin@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/mmu-radix64.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 274494903244..04690b64828f 100644
--- a/target/ppc/mmu-radix64.c
+++ b/target/ppc/mmu-radix64.c
@@ -354,6 +354,17 @@ static int ppc_radix64_partition_scoped_xlate(PowerPCCPU
*cpu,
return 0;
}
+/*
+ * The spapr vhc has a flat partition scope provided by qemu memory.
+ */
+static bool vhyp_flat_addressing(PowerPCCPU *cpu)
+{
+ if (cpu->vhyp) {
+ return true;
+ }
+ return false;
+}
+
static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu,
MMUAccessType access_type,
vaddr eaddr, uint64_t pid,
@@ -385,7 +396,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu,
}
prtbe_addr = (pate.dw1 & PATE1_R_PRTB) + offset;
- if (cpu->vhyp) {
+ if (vhyp_flat_addressing(cpu)) {
prtbe0 = ldq_phys(cs->as, prtbe_addr);
} else {
/*
@@ -411,7 +422,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu,
*g_page_size = PRTBE_R_GET_RTS(prtbe0);
base_addr = prtbe0 & PRTBE_R_RPDB;
nls = prtbe0 & PRTBE_R_RPDS;
- if (msr_hv || cpu->vhyp) {
+ if (msr_hv || vhyp_flat_addressing(cpu)) {
/*
* Can treat process table addresses as real addresses
*/
@@ -515,7 +526,7 @@ static bool ppc_radix64_xlate_impl(PowerPCCPU *cpu, vaddr
eaddr,
relocation = !mmuidx_real(mmu_idx);
/* HV or virtual hypervisor Real Mode Access */
- if (!relocation && (mmuidx_hv(mmu_idx) || cpu->vhyp)) {
+ if (!relocation && (mmuidx_hv(mmu_idx) || vhyp_flat_addressing(cpu))) {
/* In real mode top 4 effective addr bits (mostly) ignored */
*raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL;
@@ -594,7 +605,7 @@ static bool ppc_radix64_xlate_impl(PowerPCCPU *cpu, vaddr
eaddr,
g_raddr = eaddr & R_EADDR_MASK;
}
- if (cpu->vhyp) {
+ if (vhyp_flat_addressing(cpu)) {
*raddr = g_raddr;
} else {
/*
--
2.34.1
- [PULL 05/39] spapr: prevent hdec timer being set up under virtual hypervisor, (continued)
- [PULL 05/39] spapr: prevent hdec timer being set up under virtual hypervisor, Cédric Le Goater, 2022/02/18
- [PULL 28/39] target/ppc: cpu_init: Move e300 SPR registration into a function, Cédric Le Goater, 2022/02/18
- [PULL 03/39] spapr: nvdimm: Introduce spapr-nvdimm device, Cédric Le Goater, 2022/02/18
- [PULL 12/39] spapr: implement nested-hv capability for the virtual hypervisor, Cédric Le Goater, 2022/02/18
- [PULL 35/39] target/ppc: Rename spr_tcg.h to spr_common.h, Cédric Le Goater, 2022/02/18
- [PULL 21/39] target/ppc: cpu_init: Decouple 74xx SPR registration from 7xx, Cédric Le Goater, 2022/02/18
- [PULL 36/39] target/ppc: cpu_init: Expose some SPR registration helpers, Cédric Le Goater, 2022/02/18
- [PULL 15/39] target/ppc: cpu_init: Group registration of generic SPRs, Cédric Le Goater, 2022/02/18
- [PULL 32/39] target/ppc: cpu_init: Reuse init_proc_745 for the 755, Cédric Le Goater, 2022/02/18
- [PULL 29/39] target/ppc: cpu_init: Move 604e SPR registration into a function, Cédric Le Goater, 2022/02/18
- [PULL 07/39] target/ppc: add vhyp addressing mode helper for radix MMU,
Cédric Le Goater <=
- [PULL 30/39] target/ppc: cpu_init: Reuse init_proc_603 for the e300, Cédric Le Goater, 2022/02/18
- [PULL 09/39] target/ppc: add helper for books vhyp hypercall handler, Cédric Le Goater, 2022/02/18
- [PULL 31/39] target/ppc: cpu_init: Reuse init_proc_604 for the 604e, Cédric Le Goater, 2022/02/18
- [PULL 22/39] target/ppc: cpu_init: Deduplicate 440 SPR registration, Cédric Le Goater, 2022/02/18
- [PULL 33/39] target/ppc: cpu_init: Rename register_ne_601_sprs, Cédric Le Goater, 2022/02/18
- [PULL 19/39] target/ppc: cpu_init: Move G2 SPRs into register_G2_sprs, Cédric Le Goater, 2022/02/18
- [PULL 10/39] target/ppc: Add powerpc_reset_excp_state helper, Cédric Le Goater, 2022/02/18
- [PULL 27/39] target/ppc: cpu_init: Move 755 L2 cache SPRs into a function, Cédric Le Goater, 2022/02/18
- [PULL 25/39] target/ppc: cpu_init: Deduplicate 745/755 SPR registration, Cédric Le Goater, 2022/02/18
- [PULL 20/39] target/ppc: cpu_init: Decouple G2 SPR registration from 755, Cédric Le Goater, 2022/02/18