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[PULL 10/39] target/ppc: Add powerpc_reset_excp_state helper
From: |
Cédric Le Goater |
Subject: |
[PULL 10/39] target/ppc: Add powerpc_reset_excp_state helper |
Date: |
Fri, 18 Feb 2022 11:37:58 +0100 |
From: Nicholas Piggin <npiggin@gmail.com>
This moves the logic to reset the QEMU exception state into its own
function.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[ clg: checkpatch fixes ]
Message-Id: <20220216102545.1808018-8-npiggin@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/excp_helper.c | 42 +++++++++++++++++++++-------------------
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 6b6ec71bc22a..7499fa187f6f 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -360,12 +360,21 @@ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp,
target_ulong msr,
}
#endif
-static void powerpc_set_excp_state(PowerPCCPU *cpu,
- target_ulong vector, target_ulong
msr)
+static void powerpc_reset_excp_state(PowerPCCPU *cpu)
{
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
+ /* Reset exception state */
+ cs->exception_index = POWERPC_EXCP_NONE;
+ env->error_code = 0;
+}
+
+static void powerpc_set_excp_state(PowerPCCPU *cpu, target_ulong vector,
+ target_ulong msr)
+{
+ CPUPPCState *env = &cpu->env;
+
assert((msr & env->msr_mask) == msr);
/*
@@ -376,21 +385,20 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu,
* will prevent setting of the HV bit which some exceptions might need
* to do.
*/
+ env->nip = vector;
env->msr = msr;
hreg_compute_hflags(env);
- env->nip = vector;
- /* Reset exception state */
- cs->exception_index = POWERPC_EXCP_NONE;
- env->error_code = 0;
- /* Reset the reservation */
- env->reserve_addr = -1;
+ powerpc_reset_excp_state(cpu);
/*
* Any interrupt is context synchronizing, check if TCG TLB needs
* a delayed flush on ppc64
*/
check_tlb_flush(env, false);
+
+ /* Reset the reservation */
+ env->reserve_addr = -1;
}
static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
@@ -471,8 +479,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
trace_ppc_excp_fp_ignore();
- cs->exception_index = POWERPC_EXCP_NONE;
- env->error_code = 0;
+ powerpc_reset_excp_state(cpu);
return;
}
env->spr[SPR_40x_ESR] = ESR_FP;
@@ -609,8 +616,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
trace_ppc_excp_fp_ignore();
- cs->exception_index = POWERPC_EXCP_NONE;
- env->error_code = 0;
+ powerpc_reset_excp_state(cpu);
return;
}
@@ -783,8 +789,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
trace_ppc_excp_fp_ignore();
- cs->exception_index = POWERPC_EXCP_NONE;
- env->error_code = 0;
+ powerpc_reset_excp_state(cpu);
return;
}
@@ -969,8 +974,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
trace_ppc_excp_fp_ignore();
- cs->exception_index = POWERPC_EXCP_NONE;
- env->error_code = 0;
+ powerpc_reset_excp_state(cpu);
return;
}
@@ -1168,8 +1172,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
trace_ppc_excp_fp_ignore();
- cs->exception_index = POWERPC_EXCP_NONE;
- env->error_code = 0;
+ powerpc_reset_excp_state(cpu);
return;
}
@@ -1406,8 +1409,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
trace_ppc_excp_fp_ignore();
- cs->exception_index = POWERPC_EXCP_NONE;
- env->error_code = 0;
+ powerpc_reset_excp_state(cpu);
return;
}
--
2.34.1
- [PULL 15/39] target/ppc: cpu_init: Group registration of generic SPRs, (continued)
- [PULL 15/39] target/ppc: cpu_init: Group registration of generic SPRs, Cédric Le Goater, 2022/02/18
- [PULL 32/39] target/ppc: cpu_init: Reuse init_proc_745 for the 755, Cédric Le Goater, 2022/02/18
- [PULL 29/39] target/ppc: cpu_init: Move 604e SPR registration into a function, Cédric Le Goater, 2022/02/18
- [PULL 07/39] target/ppc: add vhyp addressing mode helper for radix MMU, Cédric Le Goater, 2022/02/18
- [PULL 30/39] target/ppc: cpu_init: Reuse init_proc_603 for the e300, Cédric Le Goater, 2022/02/18
- [PULL 09/39] target/ppc: add helper for books vhyp hypercall handler, Cédric Le Goater, 2022/02/18
- [PULL 31/39] target/ppc: cpu_init: Reuse init_proc_604 for the 604e, Cédric Le Goater, 2022/02/18
- [PULL 22/39] target/ppc: cpu_init: Deduplicate 440 SPR registration, Cédric Le Goater, 2022/02/18
- [PULL 33/39] target/ppc: cpu_init: Rename register_ne_601_sprs, Cédric Le Goater, 2022/02/18
- [PULL 19/39] target/ppc: cpu_init: Move G2 SPRs into register_G2_sprs, Cédric Le Goater, 2022/02/18
- [PULL 10/39] target/ppc: Add powerpc_reset_excp_state helper,
Cédric Le Goater <=
- [PULL 27/39] target/ppc: cpu_init: Move 755 L2 cache SPRs into a function, Cédric Le Goater, 2022/02/18
- [PULL 25/39] target/ppc: cpu_init: Deduplicate 745/755 SPR registration, Cédric Le Goater, 2022/02/18
- [PULL 20/39] target/ppc: cpu_init: Decouple G2 SPR registration from 755, Cédric Le Goater, 2022/02/18
- [PULL 23/39] target/ppc: cpu_init: Deduplicate 603 SPR registration, Cédric Le Goater, 2022/02/18
- [PULL 38/39] target/ppc: cpu_init: Move check_pow and QOM macros to a header, Cédric Le Goater, 2022/02/18
- [PULL 39/39] target/ppc: Move common SPR functions out of cpu_init, Cédric Le Goater, 2022/02/18
- [PULL 18/39] target/ppc: cpu_init: Move 405 SPRs into register_405_sprs, Cédric Le Goater, 2022/02/18
- Re: [PULL 00/39] ppc queue, Peter Maydell, 2022/02/20