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[PULL 22/87] target/ppc: implement vclrrb
From: |
Cédric Le Goater |
Subject: |
[PULL 22/87] target/ppc: implement vclrrb |
Date: |
Wed, 2 Mar 2022 12:06:58 +0100 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-17-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/insn32.decode | 1 +
target/ppc/translate/vmx-impl.c.inc | 32 +++++++++++++++++++++--------
2 files changed, 25 insertions(+), 8 deletions(-)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 31cdbba86bfb..b20f1eaa8e9c 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -530,6 +530,7 @@ VSTRIHL 000100 ..... 00010 ..... . 0000001101
@VX_tb_rc
VSTRIHR 000100 ..... 00011 ..... . 0000001101 @VX_tb_rc
VCLRLB 000100 ..... ..... ..... 00110001101 @VX
+VCLRRB 000100 ..... ..... ..... 00111001101 @VX
# VSX Load/Store Instructions
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index d43fba00ed43..4db5656669c7 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1940,7 +1940,7 @@ TRANS(VSTRIBR, do_vstri, gen_helper_VSTRIBR)
TRANS(VSTRIHL, do_vstri, gen_helper_VSTRIHL)
TRANS(VSTRIHR, do_vstri, gen_helper_VSTRIHR)
-static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a)
+static bool do_vclrb(DisasContext *ctx, arg_VX *a, bool right)
{
TCGv_i64 rb, mh, ml, tmp,
ones = tcg_constant_i64(-1),
@@ -1954,15 +1954,28 @@ static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a)
tcg_gen_extu_tl_i64(rb, cpu_gpr[a->vrb]);
tcg_gen_andi_i64(tmp, rb, 7);
tcg_gen_shli_i64(tmp, tmp, 3);
- tcg_gen_shl_i64(tmp, ones, tmp);
+ if (right) {
+ tcg_gen_shr_i64(tmp, ones, tmp);
+ } else {
+ tcg_gen_shl_i64(tmp, ones, tmp);
+ }
tcg_gen_not_i64(tmp, tmp);
- tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8),
- tmp, ones);
- tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8),
- zero, tmp);
- tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(16),
- mh, ones);
+ if (right) {
+ tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8),
+ tmp, ones);
+ tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8),
+ zero, tmp);
+ tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(16),
+ ml, ones);
+ } else {
+ tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8),
+ tmp, ones);
+ tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8),
+ zero, tmp);
+ tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(16),
+ mh, ones);
+ }
get_avr64(tmp, a->vra, true);
tcg_gen_and_i64(tmp, tmp, mh);
@@ -1980,6 +1993,9 @@ static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a)
return true;
}
+TRANS(VCLRLB, do_vclrb, false)
+TRANS(VCLRRB, do_vclrb, true)
+
#define GEN_VAFORM_PAIRED(name0, name1, opc2) \
static void glue(gen_, name0##_##name1)(DisasContext *ctx) \
{ \
--
2.34.1
- [PULL 05/87] target/ppc: add PPC_INTERRUPT_EBB and EBB exceptions, (continued)
- [PULL 05/87] target/ppc: add PPC_INTERRUPT_EBB and EBB exceptions, Cédric Le Goater, 2022/03/02
- [PULL 01/87] hw/ppc/pnv: Determine ns16550's IRQ number from QOM property, Cédric Le Goater, 2022/03/02
- [PULL 06/87] target/ppc: trigger PERFM EBBs from power8-pmu.c, Cédric Le Goater, 2022/03/02
- [PULL 08/87] target/ppc: moved vector even and odd multiplication to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 21/87] target/ppc: implement vclrlb, Cédric Le Goater, 2022/03/02
- [PULL 12/87] target/ppc: Implement vmsumudm instruction, Cédric Le Goater, 2022/03/02
- [PULL 13/87] target/ppc: Move vexts[bhw]2[wd] to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 10/87] target/ppc: vmulh* instructions without helpers, Cédric Le Goater, 2022/03/02
- [PULL 19/87] target/ppc: Implement Vector Compare Quadword, Cédric Le Goater, 2022/03/02
- [PULL 14/87] target/ppc: Implement vextsd2q, Cédric Le Goater, 2022/03/02
- [PULL 22/87] target/ppc: implement vclrrb,
Cédric Le Goater <=
- [PULL 18/87] target/ppc: Implement Vector Compare Greater Than Quadword, Cédric Le Goater, 2022/03/02
- [PULL 23/87] target/ppc: implement vcntmb[bhwd], Cédric Le Goater, 2022/03/02
- [PULL 15/87] target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 34/87] target/ppc: Move vsel and vperm/vpermr to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 17/87] target/ppc: Implement Vector Compare Equal Quadword, Cédric Le Goater, 2022/03/02
- [PULL 20/87] target/ppc: implement vstri[bh][lr], Cédric Le Goater, 2022/03/02
- [PULL 27/87] target/ppc: implement vsrq, Cédric Le Goater, 2022/03/02
- [PULL 28/87] target/ppc: implement vsraq, Cédric Le Goater, 2022/03/02
- [PULL 09/87] target/ppc: Moved vector multiply high and low to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 31/87] target/ppc: implement vrlq, Cédric Le Goater, 2022/03/02