Re: [PATCH v2 5/5] tests/tcg/ppc64le: Use Altivec register names in clobbler list

[Richard Henderson]

On 3/3/22 10:53, Matheus K. Ferst wrote:
> On 03/03/2022 16:30, Richard Henderson wrote:
> > On 3/3/22 07:20, matheus.ferst@eldorado.org.br wrote:
> > > From: Matheus Ferst <matheus.ferst@eldorado.org.br>
> > >
> > > LLVM/Clang doesn't know the VSX registers when compiling with
> > > -mabi=elfv1. Use only registers >= 32 and list them with their Altivec
> > > name.
> > >
> > > Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
> >
> > This description isn't quite right.  The change to the m[tf]vsr insns is a 
> > generic bug
> > fix, and not related to Clang.
>
> I'm not sure if I understood. I'm targeting the Clang problem with this patch, is 
> something else being fixed by this change?
> AFAICT, the old "mtvsrd 0, %2" and "mfvsrd %0, 0" were correct, I'm just changing from VSR 
> 0 to VSR 32 to allow the clobber with Clang, but GCC doesn't seem to have this limitation 
> with ELFv1.

Oh, whoops, I mis-read the patch.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~