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[PULL 18/33] exec/cpu: Make address_space_init/reloading_memory_map targ
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 18/33] exec/cpu: Make address_space_init/reloading_memory_map target agnostic |
Date: |
Sun, 6 Mar 2022 13:59:45 +0100 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
cpu_address_space_init() and cpu_reloading_memory_map() are
target-agnostic, but are declared in "exec/exec-all.h" which
contains target-specific declarations. Any target-agnostic
source including "exec/exec-all.h" becomes target-specific and
we have to compile it N times for the N targets built. In order
to avoid that, move the declarations to "exec/cpu-common.h" which
only contains target-agnostic declarations.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220207075426.81934-20-f4bug@amsat.org>
---
include/exec/cpu-common.h | 23 +++++++++++++++++++++++
include/exec/exec-all.h | 25 -------------------------
2 files changed, 23 insertions(+), 25 deletions(-)
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 8031ebc680c..7f7b5943c7b 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -90,6 +90,28 @@ void qemu_ram_unset_migratable(RAMBlock *rb);
size_t qemu_ram_pagesize(RAMBlock *block);
size_t qemu_ram_pagesize_largest(void);
+/**
+ * cpu_address_space_init:
+ * @cpu: CPU to add this address space to
+ * @asidx: integer index of this address space
+ * @prefix: prefix to be used as name of address space
+ * @mr: the root memory region of address space
+ *
+ * Add the specified address space to the CPU's cpu_ases list.
+ * The address space added with @asidx 0 is the one used for the
+ * convenience pointer cpu->as.
+ * The target-specific code which registers ASes is responsible
+ * for defining what semantics address space 0, 1, 2, etc have.
+ *
+ * Before the first call to this function, the caller must set
+ * cpu->num_ases to the total number of address spaces it needs
+ * to support.
+ *
+ * Note that with KVM only one address space is supported.
+ */
+void cpu_address_space_init(CPUState *cpu, int asidx,
+ const char *prefix, MemoryRegion *mr);
+
void cpu_physical_memory_rw(hwaddr addr, void *buf,
hwaddr len, bool is_write);
static inline void cpu_physical_memory_read(hwaddr addr,
@@ -102,6 +124,7 @@ static inline void cpu_physical_memory_write(hwaddr addr,
{
cpu_physical_memory_rw(addr, (void *)buf, len, true);
}
+void cpu_reloading_memory_map(void);
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
bool is_write);
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index edc8e5fa1ec..d2cb0981f40 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -80,31 +80,6 @@ static inline bool cpu_loop_exit_requested(CPUState *cpu)
return (int32_t)qatomic_read(&cpu_neg(cpu)->icount_decr.u32) < 0;
}
-#if !defined(CONFIG_USER_ONLY)
-void cpu_reloading_memory_map(void);
-/**
- * cpu_address_space_init:
- * @cpu: CPU to add this address space to
- * @asidx: integer index of this address space
- * @prefix: prefix to be used as name of address space
- * @mr: the root memory region of address space
- *
- * Add the specified address space to the CPU's cpu_ases list.
- * The address space added with @asidx 0 is the one used for the
- * convenience pointer cpu->as.
- * The target-specific code which registers ASes is responsible
- * for defining what semantics address space 0, 1, 2, etc have.
- *
- * Before the first call to this function, the caller must set
- * cpu->num_ases to the total number of address spaces it needs
- * to support.
- *
- * Note that with KVM only one address space is supported.
- */
-void cpu_address_space_init(CPUState *cpu, int asidx,
- const char *prefix, MemoryRegion *mr);
-#endif
-
#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
/* cputlb.c */
/**
--
2.35.1
- [PULL 08/33] accel/hax: Introduce CONFIG_HAX_IS_POSSIBLE, (continued)
- [PULL 08/33] accel/hax: Introduce CONFIG_HAX_IS_POSSIBLE, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 09/33] softmmu/cpus: Code movement, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 10/33] accel: Introduce AccelOpsClass::cpu_thread_is_idle(), Philippe Mathieu-Daudé, 2022/03/06
- [PULL 11/33] accel: Introduce AccelOpsClass::cpus_are_resettable(), Philippe Mathieu-Daudé, 2022/03/06
- [PULL 12/33] softmmu/globals: Remove unused 'hw/i386/*' headers, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 13/33] softmmu/physmem: Remove unnecessary include, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 14/33] softmmu/cpu-timers: Remove unused 'exec/exec-all.h' header, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 15/33] misc: Remove unnecessary "sysemu/cpu-timers.h" include, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 16/33] misc: Add missing "sysemu/cpu-timers.h" include, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 17/33] exec/gdbstub: Make gdb_exit() / gdb_set_stop_cpu() target agnostic, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 18/33] exec/cpu: Make address_space_init/reloading_memory_map target agnostic,
Philippe Mathieu-Daudé <=
- [PULL 19/33] softmmu: Add qemu_init_arch_modules(), Philippe Mathieu-Daudé, 2022/03/06
- [PULL 20/33] softmmu: Build target-agnostic objects once, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 21/33] meson: Display libfdt as disabled when system emulation is disabled, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 22/33] exec/cpu_ldst: Include 'cpu.h' to get target_ulong definition, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 23/33] cpu: Add missing 'exec/exec-all.h' and 'qemu/accel.h' headers, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 25/33] Hexagon (target/hexagon) convert to OBJECT_DECLARE_TYPE, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 24/33] target/i386/tcg/sysemu: Include missing 'exec/exec-all.h' header, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 26/33] target: Include missing 'cpu.h', Philippe Mathieu-Daudé, 2022/03/06
- [PULL 27/33] target/hexagon: Add missing 'hw/core/cpu.h' include, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 28/33] target: Use forward declared type instead of structure type, Philippe Mathieu-Daudé, 2022/03/06