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[PULL 26/33] target: Include missing 'cpu.h'
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 26/33] target: Include missing 'cpu.h' |
Date: |
Sun, 6 Mar 2022 13:59:53 +0100 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
These target-specific files use the target-specific CPU state
but lack to include "cpu.h"; i.e.:
../target/riscv/pmp.h:61:23: error: unknown type name 'CPURISCVState'
void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
^
../target/nios2/mmu.h:43:18: error: unknown type name 'CPUNios2State'
void mmu_flip_um(CPUNios2State *env, unsigned int um);
^
../target/microblaze/mmu.h:88:19: error: unknown type name 'CPUMBState';
did you mean 'CPUState'?
uint32_t mmu_read(CPUMBState *env, bool ea, uint32_t rn);
^~~~~~~~~~
CPUState
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-10-f4bug@amsat.org>
---
target/microblaze/mmu.h | 2 ++
target/mips/internal.h | 1 +
target/nios2/mmu.h | 2 ++
target/riscv/pmp.h | 2 ++
4 files changed, 7 insertions(+)
diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h
index b6b4b9ad603..1068bd2d52b 100644
--- a/target/microblaze/mmu.h
+++ b/target/microblaze/mmu.h
@@ -20,6 +20,8 @@
#ifndef TARGET_MICROBLAZE_MMU_H
#define TARGET_MICROBLAZE_MMU_H
+#include "cpu.h"
+
#define MMU_R_PID 0
#define MMU_R_ZPR 1
#define MMU_R_TLBX 2
diff --git a/target/mips/internal.h b/target/mips/internal.h
index daddb05fd43..f705d6bfa61 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -12,6 +12,7 @@
#ifdef CONFIG_TCG
#include "tcg/tcg-internal.h"
#endif
+#include "cpu.h"
/*
* MMU types, the first four entries have the same layout as the
diff --git a/target/nios2/mmu.h b/target/nios2/mmu.h
index b7785b46c01..5b085900fbf 100644
--- a/target/nios2/mmu.h
+++ b/target/nios2/mmu.h
@@ -21,6 +21,8 @@
#ifndef NIOS2_MMU_H
#define NIOS2_MMU_H
+#include "cpu.h"
+
typedef struct Nios2TLBEntry {
target_ulong tag;
target_ulong data;
diff --git a/target/riscv/pmp.h b/target/riscv/pmp.h
index a9a0b363a77..fcb6b7c4677 100644
--- a/target/riscv/pmp.h
+++ b/target/riscv/pmp.h
@@ -22,6 +22,8 @@
#ifndef RISCV_PMP_H
#define RISCV_PMP_H
+#include "cpu.h"
+
typedef enum {
PMP_READ = 1 << 0,
PMP_WRITE = 1 << 1,
--
2.35.1
- [PULL 16/33] misc: Add missing "sysemu/cpu-timers.h" include, (continued)
- [PULL 16/33] misc: Add missing "sysemu/cpu-timers.h" include, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 17/33] exec/gdbstub: Make gdb_exit() / gdb_set_stop_cpu() target agnostic, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 18/33] exec/cpu: Make address_space_init/reloading_memory_map target agnostic, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 19/33] softmmu: Add qemu_init_arch_modules(), Philippe Mathieu-Daudé, 2022/03/06
- [PULL 20/33] softmmu: Build target-agnostic objects once, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 21/33] meson: Display libfdt as disabled when system emulation is disabled, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 22/33] exec/cpu_ldst: Include 'cpu.h' to get target_ulong definition, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 23/33] cpu: Add missing 'exec/exec-all.h' and 'qemu/accel.h' headers, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 25/33] Hexagon (target/hexagon) convert to OBJECT_DECLARE_TYPE, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 24/33] target/i386/tcg/sysemu: Include missing 'exec/exec-all.h' header, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 26/33] target: Include missing 'cpu.h',
Philippe Mathieu-Daudé <=
- [PULL 27/33] target/hexagon: Add missing 'hw/core/cpu.h' include, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 28/33] target: Use forward declared type instead of structure type, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 29/33] target: Use CPUArchState as interface to target-specific CPU state, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 30/33] target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 31/33] target: Use ArchCPU as interface to target CPU, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 32/33] target/i386: Remove pointless CPUArchState casts, Philippe Mathieu-Daudé, 2022/03/06
- [PULL 33/33] accel/tcg: Remove pointless CPUArchState casts, Philippe Mathieu-Daudé, 2022/03/06
- Re: [PULL 00/33] Abstract ArchCPU, Peter Maydell, 2022/03/06