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[PATCH v7 46/46] cxl/cxl-host: Support interleave decoding with one leve
From: |
Jonathan Cameron |
Subject: |
[PATCH v7 46/46] cxl/cxl-host: Support interleave decoding with one level of switches. |
Date: |
Sun, 6 Mar 2022 17:41:37 +0000 |
Extend the walk of the CXL bus during interleave decoding to take
into account one layer of switches.
Whilst theoretically CXL 2.0 allows multiple switch levels, in the
vast majority of usecases only one level is expected and currently
that is all the proposed Linux support provides.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/cxl/cxl-host.c | 44 ++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 42 insertions(+), 2 deletions(-)
diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c
index a1eafa89bb..ac20d9e2f5 100644
--- a/hw/cxl/cxl-host.c
+++ b/hw/cxl/cxl-host.c
@@ -130,8 +130,9 @@ static bool cxl_hdm_find_target(uint32_t *cache_mem, hwaddr
addr,
static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr)
{
- CXLComponentState *hb_cstate;
+ CXLComponentState *hb_cstate, *usp_cstate;
PCIHostState *hb;
+ CXLUpstreamPort *usp;
int rb_index;
uint32_t *cache_mem;
uint8_t target;
@@ -166,7 +167,46 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow
*fw, hwaddr addr)
d = pci_bridge_get_sec_bus(PCI_BRIDGE(rp))->devices[0];
- if (!d || !object_dynamic_cast(OBJECT(d), TYPE_CXL_TYPE3_DEV)) {
+ if (!d) {
+ return NULL;
+ }
+
+ if (object_dynamic_cast(OBJECT(d), TYPE_CXL_TYPE3_DEV)) {
+ return d;
+ }
+
+ /*
+ * Could also be a switch. Note only one level of switching currently
+ * supported.
+ */
+ if (!object_dynamic_cast(OBJECT(d), TYPE_CXL_USP)) {
+ return NULL;
+ }
+ usp = CXL_USP(d);
+
+ usp_cstate = cxl_usp_to_cstate(usp);
+ if (!usp_cstate) {
+ return NULL;
+ }
+
+ cache_mem = usp_cstate->crb.cache_mem_registers;
+
+ target_found = cxl_hdm_find_target(cache_mem, addr, &target);
+ if (!target_found) {
+ return NULL;
+ }
+
+ d = pcie_find_port_by_pn(&PCI_BRIDGE(d)->sec_bus, target);
+ if (!d) {
+ return NULL;
+ }
+
+ d = pci_bridge_get_sec_bus(PCI_BRIDGE(d))->devices[0];
+ if (!d) {
+ return NULL;
+ }
+
+ if (!object_dynamic_cast(OBJECT(d), TYPE_CXL_TYPE3_DEV)) {
return NULL;
}
--
2.32.0
- [PATCH v7 36/46] i386/pc: Enable CXL fixed memory windows, (continued)
- [PATCH v7 36/46] i386/pc: Enable CXL fixed memory windows, Jonathan Cameron, 2022/03/06
- [PATCH v7 37/46] tests/acpi: q35: Allow addition of a CXL test., Jonathan Cameron, 2022/03/06
- [PATCH v7 38/46] qtests/bios-tables-test: Add a test for CXL emulation., Jonathan Cameron, 2022/03/06
- [PATCH v7 39/46] tests/acpi: Add tables for CXL emulation., Jonathan Cameron, 2022/03/06
- [PATCH v7 40/46] qtest/cxl: Add more complex test cases with CFMWs, Jonathan Cameron, 2022/03/06
- [PATCH v7 41/46] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl, Jonathan Cameron, 2022/03/06
- [PATCH v7 42/46] qtest/cxl: Add aarch64 virt test for CXL, Jonathan Cameron, 2022/03/06
- [PATCH v7 43/46] docs/cxl: Add initial Compute eXpress Link (CXL) documentation., Jonathan Cameron, 2022/03/06
- [PATCH v7 44/46] pci-bridge/cxl_upstream: Add a CXL switch upstream port, Jonathan Cameron, 2022/03/06
- [PATCH v7 45/46] pci-bridge/cxl_downstream: Add a CXL switch downstream port, Jonathan Cameron, 2022/03/06
- [PATCH v7 46/46] cxl/cxl-host: Support interleave decoding with one level of switches.,
Jonathan Cameron <=
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Michael S. Tsirkin, 2022/03/06
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Jonathan Cameron, 2022/03/07
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Peter Xu, 2022/03/09
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Jonathan Cameron, 2022/03/09
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Peter Xu, 2022/03/10
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Jonathan Cameron, 2022/03/16
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Mark Cave-Ayland, 2022/03/16
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Jonathan Cameron, 2022/03/16
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Jonathan Cameron, 2022/03/16
- Re: [PATCH v7 00/46] CXl 2.0 emulation Support, Mark Cave-Ayland, 2022/03/17