[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 16/22] x86: Add XFD faulting bit for state components
From: |
Paolo Bonzini |
Subject: |
[PULL 16/22] x86: Add XFD faulting bit for state components |
Date: |
Tue, 8 Mar 2022 12:34:39 +0100 |
From: Jing Liu <jing2.liu@intel.com>
Intel introduces XFD faulting mechanism for extended
XSAVE features to dynamically enable the features in
runtime. If CPUID (EAX=0Dh, ECX=n, n>1).ECX[2] is set
as 1, it indicates support for XFD faulting of this
state component.
Signed-off-by: Jing Liu <jing2.liu@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20220217060434.52460-5-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 3 ++-
target/i386/cpu.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 505ee289bc..79e24bb23f 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5496,7 +5496,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
const ExtSaveArea *esa = &x86_ext_save_areas[count];
*eax = esa->size;
*ebx = esa->offset;
- *ecx = esa->ecx & ESA_FEATURE_ALIGN64_MASK;
+ *ecx = esa->ecx &
+ (ESA_FEATURE_ALIGN64_MASK | ESA_FEATURE_XFD_MASK);
}
}
break;
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9630f4712a..925d0129e2 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -557,8 +557,10 @@ typedef enum X86Seg {
#define XSTATE_DYNAMIC_MASK (XSTATE_XTILE_DATA_MASK)
#define ESA_FEATURE_ALIGN64_BIT 1
+#define ESA_FEATURE_XFD_BIT 2
#define ESA_FEATURE_ALIGN64_MASK (1U << ESA_FEATURE_ALIGN64_BIT)
+#define ESA_FEATURE_XFD_MASK (1U << ESA_FEATURE_XFD_BIT)
/* CPUID feature words */
--
2.35.1
- [PULL 06/22] qga/vss: update informative message about MinGW, (continued)
- [PULL 06/22] qga/vss: update informative message about MinGW, Paolo Bonzini, 2022/03/08
- [PULL 05/22] qga/vss-win32: check old VSS SDK headers, Paolo Bonzini, 2022/03/08
- [PULL 14/22] x86: Add AMX XTILECFG and XTILEDATA components, Paolo Bonzini, 2022/03/08
- [PULL 17/22] x86: Add AMX CPUIDs enumeration, Paolo Bonzini, 2022/03/08
- [PULL 12/22] linux-headers: include missing changes from 5.17, Paolo Bonzini, 2022/03/08
- [PULL 07/22] update meson-buildoptions.sh, Paolo Bonzini, 2022/03/08
- [PULL 08/22] kvm-irqchip: introduce new API to support route change, Paolo Bonzini, 2022/03/08
- [PULL 10/22] target/i386: only include bits in pg_mode if they are not ignored, Paolo Bonzini, 2022/03/08
- [PULL 09/22] kvm/msi: do explicit commit when adding msi routes, Paolo Bonzini, 2022/03/08
- [PULL 13/22] x86: Fix the 64-byte boundary enumeration for extended state, Paolo Bonzini, 2022/03/08
- [PULL 16/22] x86: Add XFD faulting bit for state components,
Paolo Bonzini <=
- [PULL 18/22] x86: add support for KVM_CAP_XSAVE2 and AMX state migration, Paolo Bonzini, 2022/03/08
- [PULL 20/22] i386: Add Icelake-Server-v6 CPU model with 5-level EPT support, Paolo Bonzini, 2022/03/08
- [PULL 15/22] x86: Grant AMX permission for guest, Paolo Bonzini, 2022/03/08
- Re: [PULL 15/22] x86: Grant AMX permission for guest, Peter Krempa, 2022/03/16
- Re: [PULL 15/22] x86: Grant AMX permission for guest, Daniel P . Berrangé, 2022/03/16
- Re: [PULL 15/22] x86: Grant AMX permission for guest, Paolo Bonzini, 2022/03/16
- Re: [PULL 15/22] x86: Grant AMX permission for guest, David Edmondson, 2022/03/16
- Re: [PULL 15/22] x86: Grant AMX permission for guest, Daniel P . Berrangé, 2022/03/16
- Re: [PULL 15/22] x86: Grant AMX permission for guest, Maxim Levitsky, 2022/03/17
- Re: [PULL 15/22] x86: Grant AMX permission for guest, Yang Zhong, 2022/03/17