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Re: [PATCH v3 0/6] hw/arm: zynqmp: Add CRF and APU control to support PS
From: |
Peter Maydell |
Subject: |
Re: [PATCH v3 0/6] hw/arm: zynqmp: Add CRF and APU control to support PSCI |
Date: |
Fri, 18 Mar 2022 11:32:56 +0000 |
On Thu, 17 Mar 2022 at 19:21, Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
>
> On Thu, Mar 17, 2022 at 8:15 PM Peter Maydell <peter.maydell@linaro.org>
> wrote:
>>
>> On Wed, 16 Mar 2022 at 16:46, Edgar E. Iglesias
>> <edgar.iglesias@gmail.com> wrote:
>> >
>> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>> >
>> > This adds the necessary modeling to support some of our firmware
>> > tests at EL3 implementing PSCI (TBM). These are the test-cases
>> > that were previously relying on QEMU's builtin PSCI emulation.
>>
>> I wouldn't usually take patches new devices after softfreeze, but
>> on the other hand this is addressing a regression, and it only
>> affects the xilinx boards. Do you have a view on whether we should put
>> this into 7.0 or defer to 7.1 ?
> I'd lean slightly towards 7.0 (to allow our tests to pass cleanly on 7.0)
> but it's not of huge importance.
Yeah, I agree -- I'll queue this into target-arm.next for 7.0.
thanks
-- PMM
- [PATCH v3 0/6] hw/arm: zynqmp: Add CRF and APU control to support PSCI, Edgar E. Iglesias, 2022/03/16
- [PATCH v3 1/6] hw/arm/xlnx-zynqmp: Add an unimplemented SERDES area, Edgar E. Iglesias, 2022/03/16
- [PATCH v3 2/6] target/arm: Make rvbar settable after realize, Edgar E. Iglesias, 2022/03/16
- [PATCH v3 3/6] hw/misc: Add a model of the Xilinx ZynqMP CRF, Edgar E. Iglesias, 2022/03/16
- [PATCH v3 4/6] hw/arm/xlnx-zynqmp: Connect the ZynqMP CRF, Edgar E. Iglesias, 2022/03/16
- [PATCH v3 5/6] hw/misc: Add a model of the Xilinx ZynqMP APU Control, Edgar E. Iglesias, 2022/03/16
- [PATCH v3 6/6] hw/arm/xlnx-zynqmp: Connect the ZynqMP APU Control, Edgar E. Iglesias, 2022/03/16
- Re: [PATCH v3 0/6] hw/arm: zynqmp: Add CRF and APU control to support PSCI, Peter Maydell, 2022/03/17