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[PULL 09/21] hw/intc: Rename CONFIG_ARM_GIC_TCG into CONFIG_ARM_GICV3_TC
From: |
Peter Maydell |
Subject: |
[PULL 09/21] hw/intc: Rename CONFIG_ARM_GIC_TCG into CONFIG_ARM_GICV3_TCG |
Date: |
Fri, 18 Mar 2022 13:22:54 +0000 |
From: Eric Auger <eric.auger@redhat.com>
CONFIG_ARM_GIC_TCG actually guards the compilation of TCG GICv3
specific files. So let's rename it into CONFIG_ARM_GICV3_TCG
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 20220308182452.223473-2-eric.auger@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/Kconfig | 2 +-
hw/intc/meson.build | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index ec8d4cec297..a7cf301eab2 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -25,7 +25,7 @@ config APIC
select MSI_NONBROKEN
select I8259
-config ARM_GIC_TCG
+config ARM_GICV3_TCG
bool
default y
depends on ARM_GIC && TCG
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index 81ccdb0d78c..d6d012fb264 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -6,7 +6,7 @@ softmmu_ss.add(when: 'CONFIG_ARM_GIC', if_true: files(
'arm_gicv3_common.c',
'arm_gicv3_its_common.c',
))
-softmmu_ss.add(when: 'CONFIG_ARM_GIC_TCG', if_true: files(
+softmmu_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files(
'arm_gicv3.c',
'arm_gicv3_dist.c',
'arm_gicv3_its.c',
@@ -28,7 +28,7 @@ softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_PMU', if_true:
files('xlnx-pmu-iomod-in
specific_ss.add(when: 'CONFIG_ALLWINNER_A10_PIC', if_true:
files('allwinner-a10-pic.c'))
specific_ss.add(when: 'CONFIG_APIC', if_true: files('apic.c', 'apic_common.c'))
specific_ss.add(when: 'CONFIG_ARM_GIC', if_true:
files('arm_gicv3_cpuif_common.c'))
-specific_ss.add(when: 'CONFIG_ARM_GIC_TCG', if_true:
files('arm_gicv3_cpuif.c'))
+specific_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true:
files('arm_gicv3_cpuif.c'))
specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c'))
specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true:
files('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c'))
specific_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c'))
--
2.25.1
- [PULL 00/21] target-arm queue, Peter Maydell, 2022/03/18
- [PULL 01/21] target/arm: Fix sve2 ldnt1 and stnt1, Peter Maydell, 2022/03/18
- [PULL 02/21] target/arm: Fix pauth_check_trap vs SEL2, Peter Maydell, 2022/03/18
- [PULL 03/21] target/arm: Fix handling of LPAE block descriptors, Peter Maydell, 2022/03/18
- [PULL 05/21] hw/misc/npcm7xx_clk: Don't leak string in npcm7xx_clk_sel_init(), Peter Maydell, 2022/03/18
- [PULL 04/21] hw/dma/xlnx_csu_dma: Set TYPE_XLNX_CSU_DMA class_size, Peter Maydell, 2022/03/18
- [PULL 06/21] nsis installer: List emulators in alphabetical order, Peter Maydell, 2022/03/18
- [PULL 07/21] nsis installer: Suppress "ANSI targets are deprecated" warning, Peter Maydell, 2022/03/18
- [PULL 08/21] nsis installer: Fix mouse-over descriptions for emulators, Peter Maydell, 2022/03/18
- [PULL 09/21] hw/intc: Rename CONFIG_ARM_GIC_TCG into CONFIG_ARM_GICV3_TCG,
Peter Maydell <=
- [PULL 11/21] target/arm: Log M-profile vector table accesses, Peter Maydell, 2022/03/18
- [PULL 13/21] hw/arm/xlnx-zynqmp: Add an unimplemented SERDES area, Peter Maydell, 2022/03/18
- [PULL 10/21] hw/arm/virt: Fix gic-version=max when CONFIG_ARM_GICV3_TCG is unset, Peter Maydell, 2022/03/18
- [PULL 12/21] target/arm: Log fault address for M-profile faults, Peter Maydell, 2022/03/18
- [PULL 14/21] target/arm: Make rvbar settable after realize, Peter Maydell, 2022/03/18
- [PULL 15/21] hw/misc: Add a model of the Xilinx ZynqMP CRF, Peter Maydell, 2022/03/18
- [PULL 16/21] hw/arm/xlnx-zynqmp: Connect the ZynqMP CRF, Peter Maydell, 2022/03/18
- [PULL 18/21] hw/arm/xlnx-zynqmp: Connect the ZynqMP APU Control, Peter Maydell, 2022/03/18
- [PULL 17/21] hw/misc: Add a model of the Xilinx ZynqMP APU Control, Peter Maydell, 2022/03/18
- [PULL 19/21] util/osdep: Avoid madvise proto on modern Solaris, Peter Maydell, 2022/03/18