[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 11/21] target/arm: Log M-profile vector table accesses
From: |
Peter Maydell |
Subject: |
[PULL 11/21] target/arm: Log M-profile vector table accesses |
Date: |
Fri, 18 Mar 2022 13:22:56 +0000 |
Currently the CPU_LOG_INT logging misses some useful information
about loads from the vector table. Add logging where we load vector
table entries. This is particularly helpful for cases where the user
has accidentally not put a vector table in their image at all, which
can result in confusing guest crashes at startup.
Here's an example of the new logging for a case where
the vector table contains garbage:
Loaded reset SP 0x0 PC 0x0 from vector table
Loaded reset SP 0xd008f8df PC 0xf000bf00 from vector table
Taking exception 3 [Prefetch Abort] on CPU 0
...with CFSR.IACCVIOL
...BusFault with BFSR.STKERR
...taking pending nonsecure exception 3
...loading from element 3 of non-secure vector table at 0xc
...loaded new PC 0x20000558
----------------
IN:
0x20000558: 08000079 stmdaeq r0, {r0, r3, r4, r5, r6}
(The double reset logging is the result of our long-standing
"CPUs all get reset twice" weirdness; it looks a bit ugly
but it'll go away if we ever fix that :-))
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20220315204306.2797684-2-peter.maydell@linaro.org
---
target/arm/cpu.c | 5 +++++
target/arm/m_helper.c | 5 +++++
2 files changed, 10 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 185d4e774d5..498fb9f71b3 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "qemu/qemu-print.h"
#include "qemu/timer.h"
+#include "qemu/log.h"
#include "qemu-common.h"
#include "target/arm/idau.h"
#include "qemu/module.h"
@@ -366,6 +367,10 @@ static void arm_cpu_reset(DeviceState *dev)
initial_pc = ldl_phys(s->as, vecbase + 4);
}
+ qemu_log_mask(CPU_LOG_INT,
+ "Loaded reset SP 0x%x PC 0x%x from vector table\n",
+ initial_msp, initial_pc);
+
env->regs[13] = initial_msp & 0xFFFFFFFC;
env->regs[15] = initial_pc & ~1;
env->thumb = initial_pc & 1;
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index 648a3b3fc16..3bd16c0c465 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -679,6 +679,10 @@ static bool arm_v7m_load_vector(ARMCPU *cpu, int exc, bool
targets_secure,
ARMMMUIdx mmu_idx;
bool exc_secure;
+ qemu_log_mask(CPU_LOG_INT,
+ "...loading from element %d of %s vector table at 0x%x\n",
+ exc, targets_secure ? "secure" : "non-secure", addr);
+
mmu_idx = arm_v7m_mmu_idx_for_secstate_and_priv(env, targets_secure, true);
/*
@@ -719,6 +723,7 @@ static bool arm_v7m_load_vector(ARMCPU *cpu, int exc, bool
targets_secure,
goto load_fail;
}
*pvec = vector_entry;
+ qemu_log_mask(CPU_LOG_INT, "...loaded new PC 0x%x\n", *pvec);
return true;
load_fail:
--
2.25.1
- [PULL 00/21] target-arm queue, Peter Maydell, 2022/03/18
- [PULL 01/21] target/arm: Fix sve2 ldnt1 and stnt1, Peter Maydell, 2022/03/18
- [PULL 02/21] target/arm: Fix pauth_check_trap vs SEL2, Peter Maydell, 2022/03/18
- [PULL 03/21] target/arm: Fix handling of LPAE block descriptors, Peter Maydell, 2022/03/18
- [PULL 05/21] hw/misc/npcm7xx_clk: Don't leak string in npcm7xx_clk_sel_init(), Peter Maydell, 2022/03/18
- [PULL 04/21] hw/dma/xlnx_csu_dma: Set TYPE_XLNX_CSU_DMA class_size, Peter Maydell, 2022/03/18
- [PULL 06/21] nsis installer: List emulators in alphabetical order, Peter Maydell, 2022/03/18
- [PULL 07/21] nsis installer: Suppress "ANSI targets are deprecated" warning, Peter Maydell, 2022/03/18
- [PULL 08/21] nsis installer: Fix mouse-over descriptions for emulators, Peter Maydell, 2022/03/18
- [PULL 09/21] hw/intc: Rename CONFIG_ARM_GIC_TCG into CONFIG_ARM_GICV3_TCG, Peter Maydell, 2022/03/18
- [PULL 11/21] target/arm: Log M-profile vector table accesses,
Peter Maydell <=
- [PULL 13/21] hw/arm/xlnx-zynqmp: Add an unimplemented SERDES area, Peter Maydell, 2022/03/18
- [PULL 10/21] hw/arm/virt: Fix gic-version=max when CONFIG_ARM_GICV3_TCG is unset, Peter Maydell, 2022/03/18
- [PULL 12/21] target/arm: Log fault address for M-profile faults, Peter Maydell, 2022/03/18
- [PULL 14/21] target/arm: Make rvbar settable after realize, Peter Maydell, 2022/03/18
- [PULL 15/21] hw/misc: Add a model of the Xilinx ZynqMP CRF, Peter Maydell, 2022/03/18
- [PULL 16/21] hw/arm/xlnx-zynqmp: Connect the ZynqMP CRF, Peter Maydell, 2022/03/18
- [PULL 18/21] hw/arm/xlnx-zynqmp: Connect the ZynqMP APU Control, Peter Maydell, 2022/03/18
- [PULL 17/21] hw/misc: Add a model of the Xilinx ZynqMP APU Control, Peter Maydell, 2022/03/18
- [PULL 19/21] util/osdep: Avoid madvise proto on modern Solaris, Peter Maydell, 2022/03/18
- [PULL 20/21] hw/i386/acpi-build: Avoid 'sun' identifier, Peter Maydell, 2022/03/18