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Re: [PULL 0/6] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [PULL 0/6] target-arm queue |
Date: |
Sat, 2 Apr 2022 09:35:57 +0100 |
On Fri, 1 Apr 2022 at 16:01, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Some small arm bug fixes for rc3.
>
> -- PMM
>
> The following changes since commit 9b617b1bb4056e60b39be4c33be20c10928a6a5c:
>
> Merge tag 'trivial-branch-for-7.0-pull-request' of
> https://gitlab.com/laurent_vivier/qemu into staging (2022-04-01 10:23:27
> +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20220401
>
> for you to fetch changes up to a5b1e1ab662aa6dc42d5a913080fccbb8bf82e9b:
>
> target/arm: Don't use DISAS_NORETURN in STXP !HAVE_CMPXCHG128 codegen
> (2022-04-01 15:35:49 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * target/arm: Fix some bugs in secure EL2 handling
> * target/arm: Fix assert when !HAVE_CMPXCHG128
> * MAINTAINERS: change Fred Konrad's email address
>
> ----------------------------------------------------------------
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/7.0
for any user-visible changes.
-- PMM
- [PULL 0/6] target-arm queue, Peter Maydell, 2022/04/01
- [PULL 3/6] target/arm: Take VSTCR.SW, VTCR.NSW into account in final stage 2 walk, Peter Maydell, 2022/04/01
- [PULL 5/6] MAINTAINERS: change Fred Konrad's email address, Peter Maydell, 2022/04/01
- [PULL 4/6] target/arm: Determine final stage 2 output PA space based on original IPA, Peter Maydell, 2022/04/01
- [PULL 1/6] target/arm: Fix MTE access checks for disabled SEL2, Peter Maydell, 2022/04/01
- [PULL 6/6] target/arm: Don't use DISAS_NORETURN in STXP !HAVE_CMPXCHG128 codegen, Peter Maydell, 2022/04/01
- [PULL 2/6] target/arm: Check VSTCR.SW when assigning the stage 2 output PA space, Peter Maydell, 2022/04/01
- Re: [PULL 0/6] target-arm queue,
Peter Maydell <=