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[PATCH v1 09/15] cputlb: add tracepoints for the protect/unprotect helpe
From: |
Alex Bennée |
Subject: |
[PATCH v1 09/15] cputlb: add tracepoints for the protect/unprotect helpers |
Date: |
Fri, 8 Apr 2022 17:47:36 +0100 |
This helps track when pages are tagged for detecting code changes.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
accel/tcg/cputlb.c | 14 ++++++++++----
accel/tcg/trace-events | 3 +++
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 35797cea49..f2983cb2fc 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -947,18 +947,24 @@ void
tlb_flush_page_bits_by_mmuidx_all_cpus_synced(CPUState *src_cpu,
idxmap, bits);
}
-/* update the TLBs so that writes to code in the virtual page 'addr'
- can be detected */
+/*
+ * Update the TLBs so that writes to code in the virtual page 'ram_addr'
+ * can be detected.
+ */
void tlb_protect_code(ram_addr_t ram_addr)
{
+ trace_tlb_protect_code(ram_addr);
cpu_physical_memory_test_and_clear_dirty(ram_addr, TARGET_PAGE_SIZE,
DIRTY_MEMORY_CODE);
}
-/* update the TLB so that writes in physical page 'phys_addr' are no longer
- tested for self modifying code */
+/*
+ * Update the TLB so that writes in physical page 'ram_addr' are no longer
+ * tested for self modifying code
+ */
void tlb_unprotect_code(ram_addr_t ram_addr)
{
+ trace_tlb_unprotect_code(ram_addr);
cpu_physical_memory_set_dirty_flag(ram_addr, DIRTY_MEMORY_CODE);
}
diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events
index f4d1321b1b..e11e59492f 100644
--- a/accel/tcg/trace-events
+++ b/accel/tcg/trace-events
@@ -7,6 +7,9 @@ exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=0x%x"
# cputlb.c
+tlb_protect_code(uint64_t ram_addr) "0x%" PRIx64""
+tlb_unprotect_code(uint64_t ram_addr) "0x%" PRIx64""
+
memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size)
"0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u"
memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64
--
2.30.2
- [PATCH v1 00/15] testing, docs, tracepoints and cputlb hacks, Alex Bennée, 2022/04/08
- [PATCH v1 02/15] docs/devel: add some notes on the binfmt-image-debian targets, Alex Bennée, 2022/04/08
- [PATCH v1 04/15] accel/tcg: move trace events to correct location, Alex Bennée, 2022/04/08
- [PATCH v1 09/15] cputlb: add tracepoints for the protect/unprotect helpers,
Alex Bennée <=
- [PATCH v1 07/15] disas: generalise plugin_printf and use for monitor_disas, Alex Bennée, 2022/04/08
- [PATCH v1 01/15] tests/avocado: update aarch64_virt test to exercise -cpu max, Alex Bennée, 2022/04/08
- [PATCH v1 03/15] docs/devel: drop :hidden: and :includehidden: tags, Alex Bennée, 2022/04/08
- [PATCH v1 06/15] monitor: expose monitor_puts to rest of code, Alex Bennée, 2022/04/08
- [PATCH v1 05/15] accel/tcg: add tb_invalidate_phy_pages_fast tracepoint, Alex Bennée, 2022/04/08