[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 16/31] hw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq st
From: |
Peter Maydell |
Subject: |
[PULL 16/31] hw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq struct |
Date: |
Thu, 21 Apr 2022 12:18:31 +0100 |
The only time we use the ext_gic_irq[] array in the Exynos4210Irq
struct is during realize of the SoC -- we initialize it with the
input IRQs of the external GIC device, and then connect those to
outputs of other devices further on in realize (including in the
exynos4210_init_board_irqs() function). Now that the ext_gic object
is easily accessible as s->ext_gic we can make the connections
directly from one device to the other without going via this array.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220404154658.565020-10-peter.maydell@linaro.org
---
include/hw/arm/exynos4210.h | 1 -
hw/arm/exynos4210.c | 12 ++++++------
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
index f35ae90000f..08f52c511ff 100644
--- a/include/hw/arm/exynos4210.h
+++ b/include/hw/arm/exynos4210.h
@@ -83,7 +83,6 @@
typedef struct Exynos4210Irq {
qemu_irq int_combiner_irq[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
qemu_irq ext_combiner_irq[EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ];
- qemu_irq ext_gic_irq[EXYNOS4210_EXT_GIC_NIRQ];
} Exynos4210Irq;
struct Exynos4210State {
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 2058df9aecf..5a41af089f9 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -257,6 +257,7 @@ static void exynos4210_init_board_irqs(Exynos4210State *s)
{
uint32_t grp, bit, irq_id, n;
Exynos4210Irq *is = &s->irqs;
+ DeviceState *extgicdev = DEVICE(&s->ext_gic);
for (n = 0; n < EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ; n++) {
irq_id = 0;
@@ -272,7 +273,8 @@ static void exynos4210_init_board_irqs(Exynos4210State *s)
}
if (irq_id) {
s->irq_table[n] = qemu_irq_split(is->int_combiner_irq[n],
- is->ext_gic_irq[irq_id - 32]);
+ qdev_get_gpio_in(extgicdev,
+ irq_id - 32));
} else {
s->irq_table[n] = qemu_irq_split(is->int_combiner_irq[n],
is->ext_combiner_irq[n]);
@@ -287,7 +289,8 @@ static void exynos4210_init_board_irqs(Exynos4210State *s)
if (irq_id) {
s->irq_table[n] = qemu_irq_split(is->int_combiner_irq[n],
- is->ext_gic_irq[irq_id - 32]);
+ qdev_get_gpio_in(extgicdev,
+ irq_id - 32));
}
}
}
@@ -466,9 +469,6 @@ static void exynos4210_realize(DeviceState *socdev, Error
**errp)
sysbus_connect_irq(busdev, n,
qdev_get_gpio_in(DEVICE(&s->cpu_irq_orgate[n]), 1));
}
- for (n = 0; n < EXYNOS4210_EXT_GIC_NIRQ; n++) {
- s->irqs.ext_gic_irq[n] = qdev_get_gpio_in(DEVICE(&s->ext_gic), n);
- }
/* Internal Interrupt Combiner */
dev = qdev_new("exynos4210.combiner");
@@ -487,7 +487,7 @@ static void exynos4210_realize(DeviceState *socdev, Error
**errp)
busdev = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(busdev, &error_fatal);
for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
- sysbus_connect_irq(busdev, n, s->irqs.ext_gic_irq[n]);
+ sysbus_connect_irq(busdev, n, qdev_get_gpio_in(DEVICE(&s->ext_gic),
n));
}
exynos4210_combiner_get_gpioin(&s->irqs, dev, 1);
sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_COMBINER_BASE_ADDR);
--
2.25.1
- [PULL 22/31] hw/arm/exynos4210: Don't connect multiple lines to external GIC inputs, (continued)
- [PULL 22/31] hw/arm/exynos4210: Don't connect multiple lines to external GIC inputs, Peter Maydell, 2022/04/21
- [PULL 12/31] hw/arm/exynos4210: Coalesce board_irqs and irq_table, Peter Maydell, 2022/04/21
- [PULL 21/31] hw/arm/exynos4210: Connect MCT_G0 and MCT_G1 to both combiners, Peter Maydell, 2022/04/21
- [PULL 23/31] hw/arm/exynos4210: Fold combiner splits into exynos4210_init_board_irqs(), Peter Maydell, 2022/04/21
- [PULL 14/31] hw/arm/exynos4210: Move exynos4210_init_board_irqs() into exynos4210.c, Peter Maydell, 2022/04/21
- [PULL 20/31] hw/arm/exynos4210: Fill in irq_table[] for internal-combiner-only IRQ lines, Peter Maydell, 2022/04/21
- [PULL 15/31] hw/arm/exynos4210: Put external GIC into state struct, Peter Maydell, 2022/04/21
- [PULL 13/31] hw/arm/exynos4210: Fix code style nit in combiner_grp_to_gic_id[], Peter Maydell, 2022/04/21
- [PULL 19/31] hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_board_irqs(), Peter Maydell, 2022/04/21
- [PULL 18/31] hw/arm/exynos4210: Delete unused macro definitions, Peter Maydell, 2022/04/21
- [PULL 16/31] hw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq struct,
Peter Maydell <=
- [PULL 17/31] hw/arm/exynos4210: Move exynos4210_combiner_get_gpioin() into exynos4210.c, Peter Maydell, 2022/04/21
- [PULL 24/31] hw/arm/exynos4210: Put combiners into state struct, Peter Maydell, 2022/04/21
- [PULL 25/31] hw/arm/exynos4210: Drop Exynos4210Irq struct, Peter Maydell, 2022/04/21
- [PULL 29/31] hw/arm/virt: impact of gic-version on max CPUs, Peter Maydell, 2022/04/21
- [PULL 27/31] hw/arm/stellaris: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ', Peter Maydell, 2022/04/21
- [PULL 31/31] hw/arm: Use bit fields for NPCM7XX PWRON STRAPs, Peter Maydell, 2022/04/21
- [PULL 30/31] hw/misc: Add PWRON STRAP bit fields in GCR module, Peter Maydell, 2022/04/21
- [PULL 26/31] hw/arm/realview: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ', Peter Maydell, 2022/04/21
- [PULL 28/31] hw/core/irq: remove unused 'qemu_irq_split' function, Peter Maydell, 2022/04/21
- Re: [PULL 00/31] target-arm queue, Richard Henderson, 2022/04/21