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[PULL 19/31] hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_bo
From: |
Peter Maydell |
Subject: |
[PULL 19/31] hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_board_irqs() |
Date: |
Thu, 21 Apr 2022 12:18:34 +0100 |
In exynos4210_init_board_irqs(), use the TYPE_SPLIT_IRQ device
instead of qemu_irq_split().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220404154658.565020-13-peter.maydell@linaro.org
---
include/hw/arm/exynos4210.h | 9 ++++++++
hw/arm/exynos4210.c | 41 +++++++++++++++++++++++++++++--------
2 files changed, 42 insertions(+), 8 deletions(-)
diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
index f0769a4045b..f58ee0f2686 100644
--- a/include/hw/arm/exynos4210.h
+++ b/include/hw/arm/exynos4210.h
@@ -28,6 +28,7 @@
#include "hw/sysbus.h"
#include "hw/cpu/a9mpcore.h"
#include "hw/intc/exynos4210_gic.h"
+#include "hw/core/split-irq.h"
#include "target/arm/cpu-qom.h"
#include "qom/object.h"
@@ -71,6 +72,13 @@
#define EXYNOS4210_NUM_DMA 3
+/*
+ * We need one splitter for every external combiner input, plus
+ * one for every non-zero entry in combiner_grp_to_gic_id[].
+ * We'll assert in exynos4210_init_board_irqs() if this is wrong.
+ */
+#define EXYNOS4210_NUM_SPLITTERS (EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ + 60)
+
typedef struct Exynos4210Irq {
qemu_irq int_combiner_irq[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
qemu_irq ext_combiner_irq[EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ];
@@ -95,6 +103,7 @@ struct Exynos4210State {
qemu_or_irq cpu_irq_orgate[EXYNOS4210_NCPUS];
A9MPPrivState a9mpcore;
Exynos4210GicState ext_gic;
+ SplitIRQ splitter[EXYNOS4210_NUM_SPLITTERS];
};
#define TYPE_EXYNOS4210_SOC "exynos4210"
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 86a9a0dae12..919821833b5 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -263,6 +263,8 @@ static void exynos4210_init_board_irqs(Exynos4210State *s)
uint32_t grp, bit, irq_id, n;
Exynos4210Irq *is = &s->irqs;
DeviceState *extgicdev = DEVICE(&s->ext_gic);
+ int splitcount = 0;
+ DeviceState *splitter;
for (n = 0; n < EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ; n++) {
irq_id = 0;
@@ -276,13 +278,19 @@ static void exynos4210_init_board_irqs(Exynos4210State *s)
/* MCT_G1 is passed to External and GIC */
irq_id = EXT_GIC_ID_MCT_G1;
}
+
+ assert(splitcount < EXYNOS4210_NUM_SPLITTERS);
+ splitter = DEVICE(&s->splitter[splitcount]);
+ qdev_prop_set_uint16(splitter, "num-lines", 2);
+ qdev_realize(splitter, NULL, &error_abort);
+ splitcount++;
+ s->irq_table[n] = qdev_get_gpio_in(splitter, 0);
+ qdev_connect_gpio_out(splitter, 0, is->int_combiner_irq[n]);
if (irq_id) {
- s->irq_table[n] = qemu_irq_split(is->int_combiner_irq[n],
- qdev_get_gpio_in(extgicdev,
- irq_id - 32));
+ qdev_connect_gpio_out(splitter, 1,
+ qdev_get_gpio_in(extgicdev, irq_id - 32));
} else {
- s->irq_table[n] = qemu_irq_split(is->int_combiner_irq[n],
- is->ext_combiner_irq[n]);
+ qdev_connect_gpio_out(splitter, 1, is->ext_combiner_irq[n]);
}
}
for (; n < EXYNOS4210_MAX_INT_COMBINER_IN_IRQ; n++) {
@@ -293,11 +301,23 @@ static void exynos4210_init_board_irqs(Exynos4210State *s)
EXYNOS4210_MAX_EXT_COMBINER_OUT_IRQ][bit];
if (irq_id) {
- s->irq_table[n] = qemu_irq_split(is->int_combiner_irq[n],
- qdev_get_gpio_in(extgicdev,
- irq_id - 32));
+ assert(splitcount < EXYNOS4210_NUM_SPLITTERS);
+ splitter = DEVICE(&s->splitter[splitcount]);
+ qdev_prop_set_uint16(splitter, "num-lines", 2);
+ qdev_realize(splitter, NULL, &error_abort);
+ splitcount++;
+ s->irq_table[n] = qdev_get_gpio_in(splitter, 0);
+ qdev_connect_gpio_out(splitter, 0, is->int_combiner_irq[n]);
+ qdev_connect_gpio_out(splitter, 1,
+ qdev_get_gpio_in(extgicdev, irq_id - 32));
}
}
+ /*
+ * We check this here to avoid a more obscure assert later when
+ * qdev_assert_realized_properly() checks that we realized every
+ * child object we initialized.
+ */
+ assert(splitcount == EXYNOS4210_NUM_SPLITTERS);
}
/*
@@ -766,6 +786,11 @@ static void exynos4210_init(Object *obj)
object_initialize_child(obj, name, &s->cpu_irq_orgate[i], TYPE_OR_IRQ);
}
+ for (i = 0; i < ARRAY_SIZE(s->splitter); i++) {
+ g_autofree char *name = g_strdup_printf("irq-splitter%d", i);
+ object_initialize_child(obj, name, &s->splitter[i], TYPE_SPLIT_IRQ);
+ }
+
object_initialize_child(obj, "a9mpcore", &s->a9mpcore, TYPE_A9MPCORE_PRIV);
object_initialize_child(obj, "ext-gic", &s->ext_gic, TYPE_EXYNOS4210_GIC);
}
--
2.25.1
- [PULL 09/31] hw/intc/exynos4210_gic: Remove unused TYPE_EXYNOS4210_IRQ_GATE, (continued)
- [PULL 09/31] hw/intc/exynos4210_gic: Remove unused TYPE_EXYNOS4210_IRQ_GATE, Peter Maydell, 2022/04/21
- [PULL 11/31] hw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq struct, Peter Maydell, 2022/04/21
- [PULL 22/31] hw/arm/exynos4210: Don't connect multiple lines to external GIC inputs, Peter Maydell, 2022/04/21
- [PULL 12/31] hw/arm/exynos4210: Coalesce board_irqs and irq_table, Peter Maydell, 2022/04/21
- [PULL 21/31] hw/arm/exynos4210: Connect MCT_G0 and MCT_G1 to both combiners, Peter Maydell, 2022/04/21
- [PULL 23/31] hw/arm/exynos4210: Fold combiner splits into exynos4210_init_board_irqs(), Peter Maydell, 2022/04/21
- [PULL 14/31] hw/arm/exynos4210: Move exynos4210_init_board_irqs() into exynos4210.c, Peter Maydell, 2022/04/21
- [PULL 20/31] hw/arm/exynos4210: Fill in irq_table[] for internal-combiner-only IRQ lines, Peter Maydell, 2022/04/21
- [PULL 15/31] hw/arm/exynos4210: Put external GIC into state struct, Peter Maydell, 2022/04/21
- [PULL 13/31] hw/arm/exynos4210: Fix code style nit in combiner_grp_to_gic_id[], Peter Maydell, 2022/04/21
- [PULL 19/31] hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_board_irqs(),
Peter Maydell <=
- [PULL 18/31] hw/arm/exynos4210: Delete unused macro definitions, Peter Maydell, 2022/04/21
- [PULL 16/31] hw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq struct, Peter Maydell, 2022/04/21
- [PULL 17/31] hw/arm/exynos4210: Move exynos4210_combiner_get_gpioin() into exynos4210.c, Peter Maydell, 2022/04/21
- [PULL 24/31] hw/arm/exynos4210: Put combiners into state struct, Peter Maydell, 2022/04/21
- [PULL 25/31] hw/arm/exynos4210: Drop Exynos4210Irq struct, Peter Maydell, 2022/04/21
- [PULL 29/31] hw/arm/virt: impact of gic-version on max CPUs, Peter Maydell, 2022/04/21
- [PULL 27/31] hw/arm/stellaris: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ', Peter Maydell, 2022/04/21
- [PULL 31/31] hw/arm: Use bit fields for NPCM7XX PWRON STRAPs, Peter Maydell, 2022/04/21
- [PULL 30/31] hw/misc: Add PWRON STRAP bit fields in GCR module, Peter Maydell, 2022/04/21
- [PULL 26/31] hw/arm/realview: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ', Peter Maydell, 2022/04/21