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[PULL 6/7] target/rx: set PSW.I when executing wait instruction
From: |
Richard Henderson |
Subject: |
[PULL 6/7] target/rx: set PSW.I when executing wait instruction |
Date: |
Thu, 21 Apr 2022 10:31:13 -0700 |
From: Tomoaki Kawada <i@yvt.jp>
This patch fixes the implementation of the wait instruction to
implicitly update PSW.I as required by the ISA specification.
Signed-off-by: Tomoaki Kawada <i@yvt.jp>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220417045937.2128699-1-i@yvt.jp>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/rx/op_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c
index 11f952d340..81645adde3 100644
--- a/target/rx/op_helper.c
+++ b/target/rx/op_helper.c
@@ -448,6 +448,7 @@ void QEMU_NORETURN helper_wait(CPURXState *env)
cs->halted = 1;
env->in_sleep = 1;
+ env->psw_i = 1;
raise_exception(env, EXCP_HLT, 0);
}
--
2.34.1
- [PULL 0/7] target/rx patch queue, Richard Henderson, 2022/04/21
- [PULL 1/7] target/rx: Put tb_flags into DisasContext, Richard Henderson, 2022/04/21
- [PULL 3/7] target/rx: Move DISAS_UPDATE check for write to PSW, Richard Henderson, 2022/04/21
- [PULL 4/7] target/rx: Swap stack pointers on clrpsw/setpsw instruction, Richard Henderson, 2022/04/21
- [PULL 2/7] target/rx: Store PSW.U in tb->flags, Richard Henderson, 2022/04/21
- [PULL 5/7] hw/rx: rx-gdbsim DTB load address aligned of 16byte., Richard Henderson, 2022/04/21
- [PULL 6/7] target/rx: set PSW.I when executing wait instruction,
Richard Henderson <=
- [PULL 7/7] target/rx: update PC correctly in wait instruction, Richard Henderson, 2022/04/21
- Re: [PULL 0/7] target/rx patch queue, Richard Henderson, 2022/04/21