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[PATCH 5/6] target/xtensa: use tcg_constant_* for FPU conversion opcodes
From: |
Max Filippov |
Subject: |
[PATCH 5/6] target/xtensa: use tcg_constant_* for FPU conversion opcodes |
Date: |
Thu, 21 Apr 2022 14:39:16 -0700 |
FPU conversion opcodes pass scale (range 0..15) and rounding mode to
their helpers. Use tcg_constant_* for them.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
target/xtensa/translate.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index c4991735ead7..fb4d80669c47 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -6515,20 +6515,19 @@ static void translate_const_s(DisasContext *dc, const
OpcodeArg arg[],
static void translate_float_d(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
- TCGv_i32 scale = tcg_const_i32(-arg[2].imm);
+ TCGv_i32 scale = tcg_constant_i32(-arg[2].imm);
if (par[0]) {
gen_helper_uitof_d(arg[0].out, cpu_env, arg[1].in, scale);
} else {
gen_helper_itof_d(arg[0].out, cpu_env, arg[1].in, scale);
}
- tcg_temp_free(scale);
}
static void translate_float_s(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
- TCGv_i32 scale = tcg_const_i32(-arg[2].imm);
+ TCGv_i32 scale = tcg_constant_i32(-arg[2].imm);
OpcodeArg arg32[1];
get_f32_o1(arg, arg32, 0);
@@ -6538,14 +6537,13 @@ static void translate_float_s(DisasContext *dc, const
OpcodeArg arg[],
gen_helper_itof_s(arg32[0].out, cpu_env, arg[1].in, scale);
}
put_f32_o1(arg, arg32, 0);
- tcg_temp_free(scale);
}
static void translate_ftoi_d(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
- TCGv_i32 rounding_mode = tcg_const_i32(par[0]);
- TCGv_i32 scale = tcg_const_i32(arg[2].imm);
+ TCGv_i32 rounding_mode = tcg_constant_i32(par[0]);
+ TCGv_i32 scale = tcg_constant_i32(arg[2].imm);
if (par[1]) {
gen_helper_ftoui_d(arg[0].out, cpu_env, arg[1].in,
@@ -6554,15 +6552,13 @@ static void translate_ftoi_d(DisasContext *dc, const
OpcodeArg arg[],
gen_helper_ftoi_d(arg[0].out, cpu_env, arg[1].in,
rounding_mode, scale);
}
- tcg_temp_free(rounding_mode);
- tcg_temp_free(scale);
}
static void translate_ftoi_s(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
- TCGv_i32 rounding_mode = tcg_const_i32(par[0]);
- TCGv_i32 scale = tcg_const_i32(arg[2].imm);
+ TCGv_i32 rounding_mode = tcg_constant_i32(par[0]);
+ TCGv_i32 scale = tcg_constant_i32(arg[2].imm);
OpcodeArg arg32[2];
get_f32_i1(arg, arg32, 1);
@@ -6574,8 +6570,6 @@ static void translate_ftoi_s(DisasContext *dc, const
OpcodeArg arg[],
rounding_mode, scale);
}
put_f32_i1(arg, arg32, 1);
- tcg_temp_free(rounding_mode);
- tcg_temp_free(scale);
}
static void translate_ldsti(DisasContext *dc, const OpcodeArg arg[],
--
2.30.2
- [PATCH 1/6] target/xtensa: use tcg_contatnt_* for numeric literals, (continued)
- [PATCH 1/6] target/xtensa: use tcg_contatnt_* for numeric literals, Max Filippov, 2022/04/21
- [PATCH 2/6] target/xtensa: use tcg_constant_* for exceptions, Max Filippov, 2022/04/21
- [PATCH 3/6] target/xtensa: use tcg_constant_* for TLB opcodes, Max Filippov, 2022/04/21
- [PATCH 6/6] target/xtensa: use tcg_constant_* for remaining opcodes, Max Filippov, 2022/04/21
- [PATCH 4/6] target/xtensa: use tcg_constant_* for numbered special registers, Max Filippov, 2022/04/21
- [PATCH 5/6] target/xtensa: use tcg_constant_* for FPU conversion opcodes,
Max Filippov <=