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Re: [PATCH v2] target/xtensa: import core lx106
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From: |
Max Filippov |
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Subject: |
Re: [PATCH v2] target/xtensa: import core lx106 |
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Date: |
Sat, 23 Apr 2022 14:41:20 -0700 |
Hi Simon,
On Fri, Apr 22, 2022 at 9:09 PM Simon Safar <simon@simonsafar.com> wrote:
>
> This is the core used in e.g. ESP8266 chips. Importing them
> using import_core.sh, with the required files sourced from
>
> https://github.com/espressif/xtensa-overlays
>
> core-lx106.c was generated by the script; the only change is removing
> the reference to core-matmap.h which doesn't seem to be available.
>
> Signed-off-by: Simon Safar <simon@simonsafar.com>
> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
> ---
> target/xtensa/core-lx106.c | 52 +
> target/xtensa/core-lx106/core-isa.h | 470 +
> target/xtensa/core-lx106/gdb-config.c.inc | 83 +
> target/xtensa/core-lx106/xtensa-modules.c.inc | 7668 +++++++++++++++++
> target/xtensa/cores.list | 1 +
> 5 files changed, 8274 insertions(+)
> create mode 100644 target/xtensa/core-lx106.c
> create mode 100644 target/xtensa/core-lx106/core-isa.h
> create mode 100644 target/xtensa/core-lx106/gdb-config.c.inc
> create mode 100644 target/xtensa/core-lx106/xtensa-modules.c.inc
[...]
> diff --git a/target/xtensa/core-lx106/gdb-config.c.inc
> b/target/xtensa/core-lx106/gdb-config.c.inc
> new file mode 100644
> index 0000000000..9a2233b811
> --- /dev/null
> +++ b/target/xtensa/core-lx106/gdb-config.c.inc
[...]
I've noticed that this file is not from the original overlay (which I happen
to have here:
https://github.com/jcmvbkbc/xtensa-toolchain-build/blob/master/overlays/original/lx106.tar.gz),
but has been changed (by adding '& ~1' to the 7th column), probably
to make some older gdb version work.
This change is not needed for the modern gdb versions.
I've reverted this change and checked that the mainline gdb-11.1
built with the original overlay for the xtensa-elf target correctly
interacts with the QEMU. Can you please confirm that?
> + XTREG( 0, 0,32, 4, 4,0x0000,0x0006 & ~1,-2, 8,0x0100,a0,
> 0,0,0,0,0,0)
> + XTREG( 1, 4,32, 4, 4,0x0001,0x0006 & ~1,-2, 8,0x0100,a1,
> 0,0,0,0,0,0)
> + XTREG( 2, 8,32, 4, 4,0x0002,0x0006 & ~1,-2, 8,0x0100,a2,
> 0,0,0,0,0,0)
> + XTREG( 3, 12,32, 4, 4,0x0003,0x0006 & ~1,-2, 8,0x0100,a3,
> 0,0,0,0,0,0)
> + XTREG( 4, 16,32, 4, 4,0x0004,0x0006 & ~1,-2, 8,0x0100,a4,
> 0,0,0,0,0,0)
> + XTREG( 5, 20,32, 4, 4,0x0005,0x0006 & ~1,-2, 8,0x0100,a5,
> 0,0,0,0,0,0)
> + XTREG( 6, 24,32, 4, 4,0x0006,0x0006 & ~1,-2, 8,0x0100,a6,
> 0,0,0,0,0,0)
> + XTREG( 7, 28,32, 4, 4,0x0007,0x0006 & ~1,-2, 8,0x0100,a7,
> 0,0,0,0,0,0)
> + XTREG( 8, 32,32, 4, 4,0x0008,0x0006 & ~1,-2, 8,0x0100,a8,
> 0,0,0,0,0,0)
> + XTREG( 9, 36,32, 4, 4,0x0009,0x0006 & ~1,-2, 8,0x0100,a9,
> 0,0,0,0,0,0)
> + XTREG( 10, 40,32, 4, 4,0x000a,0x0006 & ~1,-2, 8,0x0100,a10,
> 0,0,0,0,0,0)
> + XTREG( 11, 44,32, 4, 4,0x000b,0x0006 & ~1,-2, 8,0x0100,a11,
> 0,0,0,0,0,0)
> + XTREG( 12, 48,32, 4, 4,0x000c,0x0006 & ~1,-2, 8,0x0100,a12,
> 0,0,0,0,0,0)
> + XTREG( 13, 52,32, 4, 4,0x000d,0x0006 & ~1,-2, 8,0x0100,a13,
> 0,0,0,0,0,0)
> + XTREG( 14, 56,32, 4, 4,0x000e,0x0006 & ~1,-2, 8,0x0100,a14,
> 0,0,0,0,0,0)
> + XTREG( 15, 60,32, 4, 4,0x000f,0x0006 & ~1,-2, 8,0x0100,a15,
> 0,0,0,0,0,0)
> + XTREG( 16, 64,32, 4, 4,0x0020,0x0006 & ~1,-2, 9,0x0100,pc,
> 0,0,0,0,0,0)
> + XTREG( 17, 68, 6, 4, 4,0x0203,0x0006 & ~1,-2, 2,0x1100,sar,
> 0,0,0,0,0,0)
> + XTREG( 18, 72,32, 4, 4,0x0205,0x0006 & ~1,-2, 2,0x1100,litbase,
> 0,0,0,0,0,0)
> + XTREG( 19, 76,32, 4, 4,0x02b0,0x0002 & ~1,-2, 2,0x1000,sr176,
> 0,0,0,0,0,0)
> + XTREG( 20, 80,32, 4, 4,0x02d0,0x0002 & ~1,-2, 2,0x1000,sr208,
> 0,0,0,0,0,0)
> + XTREG( 21, 84, 6, 4, 4,0x02e6,0x0006 & ~1,-2, 2,0x1100,ps,
> 0,0,0,0,0,0)
> + XTREG( 22, 88,32, 4, 4,0x0259,0x000d & ~1,-2, 2,0x1000,mmid,
> 0,0,0,0,0,0)
> + XTREG( 23, 92, 1, 4, 4,0x0260,0x0007 & ~1,-2,
> 2,0x1000,ibreakenable,0,0,0,0,0,0)
> + XTREG( 24, 96,32, 4, 4,0x0268,0x0007 & ~1,-2, 2,0x1000,ddr,
> 0,0,0,0,0,0)
> + XTREG( 25,100,32, 4, 4,0x0280,0x0007 & ~1,-2, 2,0x1000,ibreaka0,
> 0,0,0,0,0,0)
> + XTREG( 26,104,32, 4, 4,0x0290,0x0007 & ~1,-2, 2,0x1000,dbreaka0,
> 0,0,0,0,0,0)
> + XTREG( 27,108,32, 4, 4,0x02a0,0x0007 & ~1,-2, 2,0x1000,dbreakc0,
> 0,0,0,0,0,0)
> + XTREG( 28,112,32, 4, 4,0x02b1,0x0007 & ~1,-2, 2,0x1000,epc1,
> 0,0,0,0,0,0)
> + XTREG( 29,116,32, 4, 4,0x02b2,0x0007 & ~1,-2, 2,0x1000,epc2,
> 0,0,0,0,0,0)
> + XTREG( 30,120,32, 4, 4,0x02b3,0x0007 & ~1,-2, 2,0x1000,epc3,
> 0,0,0,0,0,0)
> + XTREG( 31,124,32, 4, 4,0x02c0,0x0007 & ~1,-2, 2,0x1000,depc,
> 0,0,0,0,0,0)
> + XTREG( 32,128, 6, 4, 4,0x02c2,0x0007 & ~1,-2, 2,0x1000,eps2,
> 0,0,0,0,0,0)
> + XTREG( 33,132, 6, 4, 4,0x02c3,0x0007 & ~1,-2, 2,0x1000,eps3,
> 0,0,0,0,0,0)
> + XTREG( 34,136,32, 4, 4,0x02d1,0x0007 & ~1,-2, 2,0x1000,excsave1,
> 0,0,0,0,0,0)
> + XTREG( 35,140,32, 4, 4,0x02d2,0x0007 & ~1,-2, 2,0x1000,excsave2,
> 0,0,0,0,0,0)
> + XTREG( 36,144,32, 4, 4,0x02d3,0x0007 & ~1,-2, 2,0x1000,excsave3,
> 0,0,0,0,0,0)
> + XTREG( 37,148,15, 4, 4,0x02e2,0x000b & ~1,-2, 2,0x1000,interrupt,
> 0,0,0,0,0,0)
> + XTREG( 38,152,15, 4, 4,0x02e2,0x000d & ~1,-2, 2,0x1000,intset,
> 0,0,0,0,0,0)
> + XTREG( 39,156,15, 4, 4,0x02e3,0x000d & ~1,-2, 2,0x1000,intclear,
> 0,0,0,0,0,0)
> + XTREG( 40,160,15, 4, 4,0x02e4,0x0007 & ~1,-2, 2,0x1000,intenable,
> 0,0,0,0,0,0)
> + XTREG( 41,164,32, 4, 4,0x02e7,0x0007 & ~1,-2, 2,0x1000,vecbase,
> 0,0,0,0,0,0)
> + XTREG( 42,168, 6, 4, 4,0x02e8,0x0007 & ~1,-2, 2,0x1000,exccause,
> 0,0,0,0,0,0)
> + XTREG( 43,172,12, 4, 4,0x02e9,0x0003 & ~1,-2, 2,0x1000,debugcause,
> 0,0,0,0,0,0)
> + XTREG( 44,176,32, 4, 4,0x02ea,0x000f & ~1,-2, 2,0x1000,ccount,
> 0,0,0,0,0,0)
> + XTREG( 45,180,32, 4, 4,0x02eb,0x0003 & ~1,-2, 2,0x1000,prid,
> 0,0,0,0,0,0)
> + XTREG( 46,184,32, 4, 4,0x02ec,0x000f & ~1,-2, 2,0x1000,icount,
> 0,0,0,0,0,0)
> + XTREG( 47,188, 4, 4, 4,0x02ed,0x0007 & ~1,-2, 2,0x1000,icountlevel,
> 0,0,0,0,0,0)
> + XTREG( 48,192,32, 4, 4,0x02ee,0x0007 & ~1,-2, 2,0x1000,excvaddr,
> 0,0,0,0,0,0)
> + XTREG( 49,196,32, 4, 4,0x02f0,0x000f & ~1,-2, 2,0x1000,ccompare0,
> 0,0,0,0,0,0)
--
Thanks.
-- Max